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SN74LVC1G00DCK
Single NAND Gate, Low-Voltage CMOS, SOT-353
Schematic Symbol
Pin Configuration (5 pins)
| Pin | Name | Type |
|---|---|---|
| 1 | input | |
| 2 | input | |
| 3 | GND | power_in |
| 4 | output | |
| 5 | VCC | power_in |
Footprint
ConfirmedPackage_TO_SOT_SMD/Texas_R-PDSO-G5_DCK-5
Pad Layout
1
2
3
4
5
Pads (5)
| Number | Type |
|---|---|
| 1 | smd |
| 2 | smd |
| 3 | smd |
| 4 | smd |
| 5 | smd |