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74LS256
dual 4-bit addressable latch
Schematic Symbol
Pin Configuration (16 pins)
| Pin | Name | Type |
|---|---|---|
| 1 | A0 | input |
| 2 | A1 | input |
| 3 | Da | input |
| 4 | Q_{0a} | output |
| 5 | Q_{1a} | output |
| 6 | Q_{2a} | output |
| 7 | Q_{3a} | output |
| 8 | GND | power_in |
| 9 | Q_{0b} | output |
| 10 | Q_{1b} | output |
| 11 | Q_{2b} | output |
| 12 | Q_{3b} | output |
| 13 | Db | input |
| 14 | ~{E} | input |
| 15 | ~{CL} | input |
| 16 | VCC | power_in |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.