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5PB1106PG
1.8V to 3.3V 1:8 LVCMOS High Performance Clock Buffer Family
Schematic Symbol
Pin Configuration (14 pins)
| Pin | Name | Type |
|---|---|---|
| 1 | CLKIN | input |
| 2 | 1G | input |
| 5 | VDD | power_in |
| 8 | VDD | power_in |
| 12 | VDD | power_in |
| 3 | Y0 | output |
| 14 | Y1 | output |
| 11 | Y2 | output |
| 13 | Y3 | output |
| 6 | Y4 | output |
| 9 | Y5 | output |
| 4 | GND | power_in |
| 7 | GND | power_in |
| 10 | GND | power_in |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.