6V49205BNLGI

Freescale P10XX and P20XX System Clock with Selectable DDR Frequency

Schematic Symbol

Pin Configuration (49 pins)

Pin	Name	Type
46	SCLK	input
47	SDATA	bidirectional
13	^FS0/USB_CLK1	bidirectional
14	^FS1/USB_CLK2	bidirectional
44	^SEL100#_66/DDRCLK	bidirectional
11	^SELPCIE125#_100/REF0	bidirectional
2	X1_25	input
1	X2_25	output
43	VddDDR	power_in
45	GndDDR	bidirectional
42	AVDDSYS	power_in
40	GNDSYS	power_in
27	VDDPCIe	power_in
28	GNDPCIe	power_in
33	AVDDPCIe	power_in
34	GNDPCIe	power_in
39	GNDPCIe	power_in
12	AVDD12_24	power_in
15	GND12_24	power_in
19	VDD2.048	power_in
16	GND2.048	power_in
20	AVDD125	power_in
22	GND125M	power_in
41	Sys_CCB	output
23	PCIeT_LR0	output
24	PCIeC_LR0	output
26	PCIeT_LR1	output
25	PCIeC_LR1	output
30	PCIeT_LR2	output
29	PCIeC_LR2	output
31	PCIeC_LR3	output
32	PCIeT_LR3	output
36	PCIeT_LR4	output
35	PCIeC_LR4	output
38	PCIeT_LR5	output
37	PCIeC_LR5	output
17	CK2.048_0	output
18	CK2.048_1	output
21	125M	output
10	REF1	output
9	REF2	output
6	REF3	output
5	REF4	output
4	REF5	output
7	VDDREF	power_in
48	VDDREF	power_in
3	GNDREF	power_in
8	GNDREF	power_in
49	EP	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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