853S012AKILF

12:1, Differential-to-3.3V, 2.5V LVPECL Clock/Data Multiplexer

Schematic Symbol

Pin Configuration (33 pins)

Pin	Name	Type
29	CLK0	input
30	nCLK0	input
31	CKL1	input
32	nCLK1	input
1	CLK2	input
2	nCLK2	input
7	CLK3	input
8	nCLK3	input
10	CLK4	input
9	nCLK4	input
12	CLK5	input
11	nCLK5	input
13	CLK6	input
14	nCLK6	input
16	nCLK7	input
15	CLK7	input
18	CLK8	input
17	nCLK8	input
24	CLK9	input
23	nCLK9	input
26	CLK10	input
25	nCLK10	input
28	CLK11	input
27	nCLK11	input
22	SEL0	input
21	SEL1	input
20	SEL2	input
19	SEL3	input
4	Q	output
5	nQ	output
3	VCC	power_in
6	VEE	power_in
33	EP	passive

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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