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853S057AGILF
4:1 Differential-to-3.3V, 2.5V LVPECL/ECL Clock Data Multiplexer
Schematic Symbol
Pin Configuration (20 pins)
| Pin | Name | Type |
|---|---|---|
| 2 | CLK0 | input |
| 3 | nCLK0 | input |
| 4 | CLK1 | input |
| 5 | nCLK1 | input |
| 6 | CLK2 | input |
| 7 | nCLK2 | input |
| 8 | CLK3 | input |
| 9 | nCLK3 | input |
| 18 | SEL0 | input |
| 19 | SEL1 | input |
| 16 | Q | output |
| 15 | nQ | output |
| 13 | VBB1 | output |
| 12 | VBB2 | output |
| 1 | VCC | power_in |
| 14 | VCC | power_in |
| 17 | VCC | power_in |
| 20 | VCC | power_in |
| 10 | VEE | power_in |
| 11 | VEE | power_in |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.
