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9DBL0452BKILF

4 Output 3.3V PCIe Zero-Delay 85Ohms Clock Buffer

Schematic Symbol

9DBL0452BKILFCLKIN~{CLKIN}~{OE0}~{OE1}~{OE2}~{OE3}SCLK_3.3HIBW_BYPM_LOB~{CKPWRGD_PD}SADR_triVDDO3.3VDDO3.3VDDA3.3VDDR3.3VDDDIG3.3FB_DNC~{FB_DNC}NCNCNCNCNCGNDGNDDIGSDATA_3.3DIF0~{DIF0}DIF1~{DIF1}DIF2~{DIF2}DIF3~{DIF3}

Pin Configuration (33 pins)

PinNameType
5CLKINinput
6~{CLKIN}input
12~{OE0}input
19~{OE1}input
24~{OE2}input
29~{OE3}input
9SCLK_3.3input
10SDATA_3.3bidirectional
1HIBW_BYPM_LOBinput
31~{CKPWRGD_PD}input
32SADR_triinput
15VDDO3.3power_in
25VDDO3.3power_in
21VDDA3.3power_in
4VDDR3.3power_in
11VDDDIG3.3power_in
13DIF0output
14~{DIF0}output
17DIF1output
18~{DIF1}output
22DIF2output
23~{DIF2}output
27DIF3output
28~{DIF3}output
2FB_DNCpassive
3~{FB_DNC}passive
7NCpassive
16NCpassive
20NCpassive
26NCpassive
30NCpassive
33GNDpower_in
8GNDDIGpower_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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Details

Pin Count33