ADS1274

Quad, Simultaneous Sampling, 24-Bit Analog-to-Digital Converters

Schematic Symbol

Pin Configuration (65 pins)

Pin	Name	Type
27	CLK	input
10	CLKDIV	input
11	~{SYNC}	input
34	MODE0	input
33	MODE1	input
32	FORMAT0	input
31	FORMAT1	input
30	FORMAT2	input
8	TEST0	input
9	TEST1	input
42	~{PWDN1}	input
41	~{PWDN2}	input
40	~{PWDN3}	input
39	~{PWDN4}	input
38	~{PWDN5}	input
37	~{PWDN6}	input
36	~{PWDN7}	input
35	~{PWDN8}	input
12	DIN	input
3	AINP1	input
4	AINN1	input
1	AINP2	input
2	AINN2	input
63	AINP3	input
64	AINN3	input
61	AINP4	input
62	AINN4	input
51	AINP5	input
52	AINN5	input
49	AINP6	input
50	AINN6	input
47	AINP7	input
48	AINN7	input
45	AINP8	input
46	AINN8	input
56	VREFP	input
57	VREFN	input
6	AGND	power_in
43	AGND	power_in
54	AGND	power_in
58	AGND	power_in
59	AGND	power_in
7	DGND	power_in
21	DGND	power_in
24	DGND	power_in
25	DGND	power_in
28	SCLK	bidirectional
29	~{DRDY}/FSYNC	bidirectional
20	DOUT1	output
19	DOUT2	output
18	DOUT3	output
17	DOUT4	output
16	DOUT5	output
15	DOUT6	output
14	DOUT7	output
13	DOUT8	output
55	VCOM	output
5	AVDD	power_in
44	AVDD	power_in
53	AVDD	power_in
60	AVDD	power_in
22	IOVDD	power_in
23	IOVDD	power_in
26	DVDD	power_in
65	PWPAD	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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