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CDC3RL02

Low Phase-Noise Two-Channel Clock Fan-Out Buffer

Schematic Symbol

CDC3RL02VBATTMCLK_INGNDCLK_REQ1CLK_REQ2VLDOCLK_OUT1CLK_OUT2

Pin Configuration (8 pins)

PinNameType
A1VBATTinput
C1MCLK_INinput
D1GNDpower_in
B1VLDOoutput
A2CLK_OUT1output
B2CLK_REQ1input
D2CLK_OUT2output
C2CLK_REQ2input

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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Details

Pin Count8