CERN_ASIC_CATIA-V0

Transimpedance Amplifier for VFE upgrade CMS-ECAL

Schematic Symbol

Pin Configuration (100 pins)

Pin	Name	Type
4	InTIA0	input
88	VDCG10_TIA0	input
87	VREFSTAB_TIA0	bidirectional
86	VDCBRIDGE_TIA0	bidirectional
5	enTIA0	input
74	OutTIA0_G1	output
73	OutTIA0_G10	output
6	InTIA1	input
85	VREFG10_TIA1	input
7	enTIA1	input
72	OutTIA1_G1	output
71	OutTIA1_G10	output
20	InTIA2	input
39	VREFG10_TIA2	input
21	enTIA2	input
54	OutTIA2_G1	output
53	OutTIA2_G10	output
22	InTIA3	input
36	VDCG10_TIA3	input
37	VREFSTAB_TIA3	bidirectional
38	VDCBRIDGE_TIA3	bidirectional
23	enTIA3	input
52	OutTIA3_G1	output
51	OutTIA3_G10	output
3	InG10	input
89	VDCG10_Alone	input
82	enG10	input
75	OutG10	output
91	VPOL1.2TIA	bidirectional
34	VPOL2.5TIA	bidirectional
9	InCSA0	input
8	enCSA0	input
83	VREFG10_CSA0	input
70	OutCSA0_G1	output
69	OutCSA0_G10	output
11	InCSA1	input
10	enCSA1	input
84	VREFG10_CSA1	input
68	OutCSA1_G1	output
67	OutCSA1_G10	output
16	InCSA2	input
17	enCSA2	input
41	VREFG10_CSA2	input
58	OutCSA2_G1	output
57	OutCSA2_G10	output
18	InCSA3	input
19	enCSA3	input
40	VREFG10_CSA3	input
56	OutCSA3_G1	output
55	OutCSA3_G10	output
92	VBOOSTCSA	input
94	BOOSTCSA	input
93	Iout1.2CSA	output
95	Imain1.2CSA	input
33	Imain2.5VCSA	input
32	Iout2.5CSA	input
31	VCASD2.5CSA	input
2	VDD1.2V	power_in
12	VDD1.2V	power_in
63	VDD1.2V	power_in
65	VDD1.2V	power_in
77	VDD1.2V	power_in
79	VDD1.2V	power_in
81	VDD1.2V	power_in
98	VDD1.2V	power_in
99	VDD1.2V	power_in
46	NC	passive
47	NC	passive
15	VDD2.5V	power_in
24	VDD2.5V	power_in
27	VDD2.5V	power_in
28	VDD2.5V	power_in
42	VDD2.5V	power_in
44	VDD2.5V	power_in
48	VDD2.5V	power_in
60	VDD2.5V	power_in
62	VDD2.5V	power_in
1	VSS	power_in
13	VSS	power_in
14	VSS	power_in
25	VSS	power_in
26	VSS	power_in
29	VSS	power_in
30	VSS	power_in
35	VSS	power_in
43	VSS	power_in
45	VSS	power_in
49	VSS	power_in
50	VSS	power_in
59	VSS	power_in
61	VSS	power_in
64	VSS	power_in
66	VSS	power_in
76	VSS	power_in
78	VSS	power_in
80	VSS	power_in
90	VSS	power_in
96	VSS	power_in
97	VSS	power_in
100	VSS	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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CERN_ASIC_CATIA-V0

Schematic Symbol

Pin Configuration (100 pins)

Footprint

Comments

Details