CERN_ASIC_CATIA-V2

Transimpedance Amplifier for VFE upgrade CMS-ECAL

Schematic Symbol

Pin Configuration (100 pins)

Pin	Name	Type
8	TIAin	input
9	TIAipol	bidirectional
10	TIA0V5ref	input
66	G1vop	output
65	G1von	output
77	Vocm	input
72	G10vop	output
71	G10von	output
33	SPlin_en	input
34	SPlin_clk	input
35	SPlin_data	input
36	SPlin_TIA_en	input
37	SPlin_INJ_dac1_en	input
38	SPlin_INJ_dac2_en	input
39	SPlin_INJ_ctrl_en	input
40	SPlin_SC_en	input
43	Arst_n	input
44	Arst_n_SM	input
45	SRST	input
58	injCMOS	input
41	SDA	bidirectional
42	SCL	input
31	SDAout2	output
30	intSpy	output
51	I2C_add<6>	input
52	I2C_add<5>	input
53	I2C_add<4>	input
54	I2C_add<3>	input
55	I2C_add<2>	input
56	I2C_add<1>	input
57	I2C_add<0>	input
61	Vdcpedp	input
62	Vdcpedn	input
21	VREF	input
22	VREF_reg	input
25	Vcm3	output
24	Vdac	output
27	TSENSOR	output
13	VSS	power_in
14	VSS	power_in
18	VSS	power_in
20	VSS	power_in
29	VSS	power_in
48	VSS	power_in
59	VSS	power_in
63	VSS	power_in
64	VSS	power_in
69	VSS	power_in
70	VSS	power_in
81	VSS	power_in
82	VSS	power_in
85	VSS	power_in
86	VSS	power_in
90	VSS	power_in
91	VSS	power_in
92	VSS	power_in
95	VSS	power_in
98	VSS	power_in
99	VSS	power_in
2	VSS	power_in
3	VSS	power_in
7	VSSpadin	power_in
11	VDDdac	power_in
12	VSSdac	power_in
75	VSSpro	power_in
87	VSSpro	power_in
26	VSScavity	power_in
50	VSScavity	power_in
76	VSScavity	power_in
100	VSScavity	power_in
49	VSSPST	power_in
1	NC	passive
78	NC	passive
17	VDD2V5	power_in
19	VDDA2V5	power_in
15	VDD2V5_inj	power_in
16	VDD2V5_inj	power_in
4	VDDTIAin	power_in
5	VDDTIAin	power_in
96	VDDTIApol	power_in
97	VDDTIApol	power_in
6	VDDpadin	power_in
79	VDDG10diff	power_in
80	VDDG10diff	power_in
83	VDDG1diff	power_in
84	VDDG1diff	power_in
88	VDDG10	power_in
89	VDDG10	power_in
93	VDDG10_G1	power_in
94	VDDG1	power_in
23	1V2	power_in
47	VDDD	power_in
60	VDDD	power_in
73	VDDG10diffout	power_in
74	VDDG10diffout	power_in
67	VDDG1diffout	power_in
68	VDDG1diffout	power_in
28	AVDD_TS	power_in
32	VDDPST	power_in
46	VDDPST	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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CERN_ASIC_CATIA-V2

Schematic Symbol

Pin Configuration (100 pins)

Footprint

Comments

Details