DP83848CVV

PHYTER™ QFP Single Port 10/100Mb/s Ethernet Physical Layer Transceiver

Schematic Symbol

Pin Configuration (48 pins)

Pin	Name	Type
30	MDIO	bidirectional
31	MDC	input
8	TCK	input
10	TMS	input
11	~{TRST}	input
12	TDI	input
9	TDO	output
17	TD_+	bidirectional
16	TD_-	bidirectional
14	RD_+	bidirectional
13	RD_-	bidirectional
1	TX_CLK	output
2	TX_EN	input
3	TXD_0	input
4	TXD_1	input
5	TXD_2	input
6	TXD_3/SNI_MODE	input
38	RX_CLK	output
41	RX_ER/MDIX_EN	output
39	RX_DV/MII_MODE	output
43	RXD_0/PHYAD1	output
44	RXD_1/PHYAD2	output
45	RXD_2/PHYAD3	output
46	RXD_3/PHYAD4	output
22	AVDD33	power_in
32	IOVDD33	power_in
48	IOVDD33	power_in
26	LED_ACT/COL/AN_EN	output
27	LED_SPEED/AN1	output
28	LED_LINK/AN0	output
34	X1	input
33	X2	output
25	CLK_OUT	output
7	PWR_DOWN/INT	input
29	RESET_N	input
40	CRS/CRS_DV/LED_CFG	output
42	COL/PHYAD0	output
24	RBIAS	input
18	PFBIN1	input
37	PFBIN2	input
23	PFBOUT	output
20	RESERVED	bidirectional
21	RESERVED	bidirectional
15	AGND	power_in
19	AGND	power_in
36	DGND	power_in
35	IOGND	power_in
47	IOGND	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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