HMC7044

High Performance, 3.2 GHz, 14-Output Jitter Attenuator with JESD204B

Schematic Symbol

Pin Configuration (69 pins)

Pin	Name	Type
39	CLKIN0/RFSYNCIN	input
40	~{CLKIN0}/~{RFSYNCIN}	input
36	CLKIN1/FIN	input
37	~{CLKIN1}/~{FIN}	input
42	CLKIN2/OSCOUT0	bidirectional
43	~{C}L~{KIN2}/~{OSCOUT0}	bidirectional
33	CLKIN3	input
34	~{CLKIN3}	input
6	SYNC	input
20	SDATA	bidirectional
18	SLEN	input
19	SCLK	input
5	RESET	input
31	GPIO1	bidirectional
52	GPIO2	bidirectional
62	GPIO3	bidirectional
63	GPIO4	bidirectional
32	CPOUT1	output
50	CPOUT2	bidirectional
47	OSCIN	input
48	~{OSCIN}	input
44	OSCOUT1	output
45	~{OSCOUT1}	output
7	BGABYP1	passive
8	LDOBYP2	passive
9	LDOBYP3	passive
11	LDOBYP4	passive
12	LDOBYP5	passive
46	LDOBYP6	passive
49	LDOBYP7	passive
10	VCC1_VCO	power_in
17	VCC2_OUT	power_in
21	VCC3_SYSREF	power_in
26	VCC4_OUT	power_in
38	VCC5_PLL1	power_in
41	VCC6_OSCOUT	power_in
51	VCC7_PLL2	power_in
57	VCC8_OUT	power_in
68	VCC9_OUT	power_in
1	CLKOUT0	output
2	~{CLKOUT0}	output
3	SCLKOUT1	output
4	~{SCLKOUT1}	output
15	CLKOUT2	output
16	~{CLKOUT2}	output
13	SCLKOUT3	output
14	~{SCLKOUT3}	output
24	CLKOUT4	output
25	~{CLKOUT4}	output
22	SCLKOUT5	output
23	~{SCLKOUT5}	output
27	CLKOUT6	output
28	~{CLKOUT6}	output
29	SCLKOUT7	output
30	~{SCLKOUT7}	output
55	CLKOUT8	output
56	~{CLKOUT8}	output
53	SCLKOUT9	output
54	~{SCLKOUT9}	output
58	CLKOUT10	output
59	~{CLKOUT10}	output
60	SCLKOUT11	output
61	~{SCLKOUT11}	output
66	CLKOUT12	output
67	~{CLKOUT12}	output
64	SCLKOUT13	output
65	~{SCLKOUT13}	output
35	RSV	passive
69	EP	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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