LMK04828

Ultra Low-Noise Clock Jitter Cleaner with Dual Loop PLLs

Schematic Symbol

Pin Configuration (65 pins)

Pin	Name	Type
20	SDIO	bidirectional
19	SCK	input
6	SYNC/SYSREF_REQ	input
18	~{CS}	input
5	RESET/GPO	input
58	CLKIN_SEL0	bidirectional
59	CLKIN_SEL1	bidirectional
31	STATUS_LD1	bidirectional
48	STATUS_LD2	bidirectional
37	CLKIN0	input
38	~{CLKIN0}	input
34	CLKIN1/FIN/FBCLKIN	input
35	~{CLKIN1}/~{FIN}/~{FBCLKIN}	input
40	CLKIN2/OSCOUT	bidirectional
41	~{CLKIN2}/~{OSCOUT}	bidirectional
43	OSCIN	input
44	~{OSCIN}	input
11	LDOBYP1	passive
12	LDOBYP2	passive
7	NC	passive
8	NC	passive
9	NC	passive
10	VCC1_VCO	power_in
17	VCC2_CG1	power_in
21	VCC3_SYSREF	power_in
26	VCC4_CG2	power_in
33	VCC5_DIG	power_in
36	VCC6_PLL1	power_in
39	VCC7_OSCOUT	power_in
42	VCC8_OSCIN	power_in
45	VCC9_CP2	power_in
47	VCC10_PLL2	power_in
53	VCC11_CG3	power_in
64	VCC12_CG0	power_in
1	DCLKOUT0	output
2	~{DCLKOUT0}	output
3	SDCLKOUT1	output
4	~{SDCLKOUT1}	output
15	DCLKOUT2	output
16	~{DCLKOUT2}	output
13	SDCLKOUT3	output
14	~{SDCLKOUT3}	output
24	DCLKOUT4	output
25	~{DCLKOUT4}	output
22	SDCLKOUT5	output
23	~{SDCLKOUT5}	output
27	DCLKOUT6	output
28	~{DCLKOUT6}	output
29	SDCLKOUT7	input
30	~{SDCLKOUT7}	power_in
51	DCLKOUT8	output
52	~{DCLKOUT8}	output
49	SDCLKOUT9	output
50	~{SDCLKOUT9}	output
54	DCLKOUT10	output
55	~{DCLKOUT10}	output
56	SDCLKOUT11	output
57	~{SDCLKOUT11}	output
62	DCLKOUT12	output
63	~{DCLKOUT12}	output
60	SDCLKOUT13	output
61	~{SDCLKOUT13}	output
32	CPOUT1	passive
46	CPOUT2	output
65	GND	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

Comments

Loading comments...

Sign in to leave a comment.