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LTC6950
1.4GHz Low Phase Noise, Low Jitter PLL with Clock Distribution
Schematic Symbol
Pin Configuration (49 pins)
| Pin | Name | Type |
|---|---|---|
| 34 | VCO+ | input |
| 35 | VCO- | input |
| 40 | CP | output |
| 45 | REF+ | input |
| 44 | REF- | input |
| 30 | SYNC | input |
| 29 | STAT1 | output |
| 28 | STAT2 | output |
| 26 | SCLK | input |
| 27 | SDI | input |
| 24 | SDO | output |
| 23 | ~{CS} | input |
| 36 | VVCO+ | power_in |
| 33 | VVCO+ | power_in |
| 39 | VCP+ | power_in |
| 46 | VREF+ | power_in |
| 43 | VREF+ | power_in |
| 18 | V+ | power_in |
| 19 | V+ | power_in |
| 20 | V+ | power_in |
| 25 | V+ | power_in |
| 32 | V+ | power_in |
| 37 | V+ | power_in |
| 42 | V+ | power_in |
| 47 | V+ | power_in |
| 3 | PECL3+ | output |
| 2 | PECL3- | output |
| 7 | PECL2+ | output |
| 6 | PECL2- | output |
| 11 | PECL1+ | output |
| 10 | PECL1- | output |
| 15 | PECL0+ | output |
| 14 | PECL0- | output |
| 22 | LV/CM+ | output |
| 21 | LV/CM- | output |
| 1 | VP3+ | power_in |
| 4 | VP3+ | power_in |
| 5 | VP2+ | power_in |
| 8 | VP2+ | power_in |
| 9 | VP1+ | power_in |
| 12 | VP1+ | power_in |
| 13 | VP0+ | power_in |
| 16 | VP0+ | power_in |
| 17 | GND | power_in |
| 31 | GND | power_in |
| 38 | GND | power_in |
| 41 | GND | power_in |
| 48 | GND | power_in |
| 49 | GND | power_in |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.