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NB6N11SMN
3.3V 1:2 AnyLevel Input to LVDS Fanout Buffer / Translator
Schematic Symbol
Pin Configuration (17 pins)
| Pin | Name | Type |
|---|---|---|
| 12 | VTD | passive |
| 11 | D | input |
| 10 | ~{D} | input |
| 9 | ~{VTD} | passive |
| 6 | NC | passive |
| 7 | VEE | power_in |
| 8 | VEE | power_in |
| 17 | EP | power_in |
| 1 | Q0 | output |
| 2 | ~{Q0} | output |
| 3 | Q1 | output |
| 4 | ~{Q1} | output |
| 5 | VCC | power_in |
| 13 | VCC | power_in |
| 14 | VCC | power_in |
| 15 | VCC | power_in |
| 16 | VCC | power_in |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.