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NB7V32M
1.8 V/2.5 V, 10 GHz 2 Clock Divider with CML Outputs
Schematic Symbol
Pin Configuration (17 pins)
| Pin | Name | Type |
|---|---|---|
| 1 | VTCLK | passive |
| 2 | CLK | input |
| 3 | ~{CLK} | input |
| 4 | ~{VTCLK} | passive |
| 15 | R | input |
| 9 | VCC | power_in |
| 13 | VCC | power_in |
| 12 | VCC | power_in |
| 14 | VCC | power_in |
| 16 | VCC | power_in |
| 11 | Q | output |
| 10 | ~{Q} | output |
| 5 | VREFAC | output |
| 6 | GND | power_in |
| 7 | GND | power_in |
| 8 | GND | power_in |
| 17 | EP | passive |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.