SCANSTA112SM

7-Port Multidrop IEEE 1149.1 (JTAG) Multiplexer

Schematic Symbol

Pin Configuration (100 pins)

Pin	Name	Type
G5	A0B0	input
H5	A1B0	input
K4	Y0B0	output
J4	Y1B0	output
J2	TDOB0	bidirectional
J3	TCKB0	input
H4	TMSB0	input
G4	~{TRST}B0	input
A1	S0	input
B2	S1	input
E4	S2	input
C2	S3	input
D4	S4	input
D3	S5	input
E3	S6	input
C1	S7	input
D1	ADDMASK	input
K1	TDIB0	input
K3	TRISTB0	output
F7	~{RESET}	input
E2	LSPSEL0	input
E5	LSPSEL1	input
F2	LSPSEL2	input
F3	LSPSEL3	input
G2	LSPSEL4	input
H1	LSPSEL5	input
G3	LSPSEL6	input
J1	MPSELB1/~{B0}	input
F4	SB/~{S}	input
D2	TRANS	input
K10	TLR_TRST	input
J9	TLR_TRST6	input
A4	VCC	power_in
A9	VCC	power_in
C3	VCC	power_in
C9	VCC	power_in
E1	VCC	power_in
F10	VCC	power_in
H2	VCC	power_in
H8	VCC	power_in
K2	VCC	power_in
K7	VCC	power_in
A6	GND	power_in
B1	GND	power_in
B3	GND	power_in
C8	GND	power_in
D10	GND	power_in
G1	GND	power_in
H3	GND	power_in
F1	~{OE}	input
K6	TDIB1	input
F5	A0B1	input
G6	A1B1	input
J7	TMSB1	input
J6	TCKB1	input
H6	~{TRST}B1	input
J5	TDOB1	bidirectional
H7	TRISTB1	output
K9	Y0B1	output
K8	Y1B1	output
F6	A001	input
E10	A101	input
H9	TDI01	input
G7	TDO01	output
F8	TCK01	output
G8	TMS01	output
H10	~{TRST}01	output
G9	Y101	output
F9	Y001	output
G10	TRIST01	output
E9	TDI02	input
E8	TDO02	output
C10	TCK02	output
D9	TMS02	output
D8	~{TRST}02	output
B10	TRIST02	output
E7	TDI03	input
A10	TDO03	output
B8	TCK03	output
B9	TMS03	output
D6	~{TRST}03	output
D7	TRIST03	output
C7	TDI04	input
C6	TDO04	output
A7	TCK04	output
A8	TMS04	output
B7	~{TRST}04	output
E6	TDI05	input
B6	TDO05	output
B5	TCK05	output
A5	TMS05	output
C5	~{TRST}05	output
B4	TDI06	input
A3	TDO06	output
A2	TCK06	output
C4	TMS06	output
D5	~{TRST}06	output
J10	GND	power_in
J8	GND	power_in
K5	GND	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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