SI53304

2 Input/6 Output, Low Jitter Universal Buffeur/Level Translator With 2:1 Input Mux And Individual Output Enable

Schematic Symbol

Pin Configuration (33 pins)

Pin	Name	Type
1	OE0	input
9	OE1	input
12	OE2	input
2	SFOUTA1	input
3	SFOUTA0	input
13	OE3	input
16	OE4	input
24	OE5	input
23	SFOUTB1	input
22	SFOUTB0	input
10	CLK0	input
11	~{CLK0}	input
14	CLK1	input
15	~{CLK1}	input
8	CLK_SEL	input
17	VREF	input
7	VDD	power_in
6	GND	power_in
33	GND	power_in
5	Q0	output
4	~{Q0}	output
32	Q1	output
31	~{Q1}	output
30	Q2	output
29	~{Q2}	output
28	Q3	output
27	~{Q3}	output
26	Q4	output
25	~{Q4}	output
21	Q5	output
20	~{Q5}	output
18	VDDOA	input
19	VDDOB	input

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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