SN65LV1224BDB

10-MHz to 66-MHz, 1:10 LVDS Deserializer

Schematic Symbol

Pin Configuration (28 pins)

Pin	Name	Type
5	RI+	input
6	RI-	input
21	DVCC	output
23	DVCC	power_in
14	DGND	input
20	DGND	power_in
22	DGND	output
4	AVCC	input
11	AVCC	input
1	AGND	input
12	AGND	input
13	AGND	input
28	ROUT0	power_in
27	ROUT1	power_in
26	ROUT2	power_in
25	ROUT3	power_in
24	ROUT4	input
19	ROUT5	input
18	ROUT6	power_in
17	ROUT7	power_in
16	ROUT8	power_in
15	ROUT9	power_in
2	RCLK_R/~{F}	input
9	RCLK	input
3	REFCLK	input
10	~{LOCK}	input
8	REN	input
7	~{PWRDN}	input

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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