Si52142

PCI-Express Gen1, Gen 2, & Gen 3 Two Output Clock Generator with 25MHz Reference Clock

Schematic Symbol

Pin Configuration (25 pins)

Pin	Name	Type
23	XIN/CLKIN	input
22	XOUT	output
19	SCLK	input
20	SDATA	bidirectional
7	SS0	input
8	SS1	input
3	OE_REF	input
5	OE_DIFF0	input
18	OE_DIFF1	input
21	VDD_CORE	power_in
1	VDD_REF	power_in
6	VDD_DIFF	power_in
12	VDD_DIFF	power_in
17	VDD_DIFF	power_in
2	REF	output
14	DIFF0	output
13	~{DIFF0}	output
16	DIFF1	output
15	~{DIFF1}	output
9	NC	passive
10	NC	passive
11	NC	passive
24	VSS_CORE	power_in
4	VSS_REF	power_in
25	GND	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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