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TPL5110
Nano-power System Timer for Power Gating
Schematic Symbol
Pin Configuration (6 pins)
| Pin | Name | Type |
|---|---|---|
| 3 | DELAY/ | input |
| 1 | VDD | power_in |
| 2 | GND | power_in |
| 6 | EN/ | input |
| 5 | DRV | output |
| 4 | DONE | input |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.