Back to browse

MC68008FN

8/32-bit microprocessor, 8-bit external data bus, 22-bit external address bus, PLCC-52 (case 778-01/778-02)

Schematic Symbol

MC68008FNV_{CC}GND~{DTACK}~{BGACK}~{BR}CLKGND~{VPA}~{BERR}~{IPL1}~{IPL2}~{IPL0}A2A3A4A5A6A7A8A9A10A11A12A13A21A14A15A16A17A18A19A20D7D6D5D4D3D2D1D0~{AS}~{DS}R/~{W}~{BG}~{HALT}~{RESET}EFC2FC1FC0A0A1

Pin Configuration (52 pins)

PinNameType
1A2tri_state
2A3tri_state
3A4tri_state
4A5tri_state
5A6tri_state
6A7tri_state
7A8tri_state
8A9tri_state
9A10tri_state
10A11tri_state
11A12tri_state
12A13tri_state
13A21tri_state
14A14tri_state
15V_{CC}power_in
16A15tri_state
17GNDpower_in
18A16tri_state
19A17tri_state
20A18tri_state
21A19tri_state
22A20tri_state
23D7bidirectional
24D6bidirectional
25D5bidirectional
26D4bidirectional
27D3bidirectional
28D2bidirectional
29D1bidirectional
30D0bidirectional
31~{AS}tri_state
32~{DS}tri_state
33R/~{W}tri_state
34~{DTACK}input
35~{BG}output
36~{BGACK}input
37~{BR}input
38CLKinput
39GNDpassive
40~{HALT}bidirectional
41~{RESET}bidirectional
42Eoutput
43~{VPA}input
44~{BERR}input
45~{IPL1}input
46~{IPL2}input
47~{IPL0}input
48FC2tri_state
49FC1tri_state
50FC0tri_state
51A0tri_state
52A1tri_state

Footprint

Confirmed

Package_LCC/MO047AD_PLCC-52_19.1x19.1mm_P1.27mm

Pad Layout
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
Pads (52)
NumberType
1smd
2smd
3smd
4smd
5smd
6smd
7smd
8smd
9smd
10smd
11smd
12smd
13smd
14smd
15smd
16smd
17smd
18smd
19smd
20smd
21smd
22smd
23smd
24smd
25smd
26smd
27smd
28smd
29smd
30smd
31smd
32smd
33smd
34smd
35smd
36smd
37smd
38smd
39smd
40smd
41smd
42smd
43smd
44smd
45smd
46smd
47smd
48smd
49smd
50smd
51smd
52smd

Comments

Loading comments...

Sign in to leave a comment.

SymbolDownload Library
Footprint

Details

Pin Count52
FootprintMO047AD_PLCC-52_19.1x19.1mm_P1.27mm
Pad Count52
View Datasheet