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R_Pack06_SIP
6 resistor network, parallel topology, SIP package
Schematic Symbol
Pin Configuration (12 pins)
| Pin | Name | Type |
|---|---|---|
| 1 | R1.1 | passive |
| 2 | R1.2 | passive |
| 3 | R2.1 | passive |
| 4 | R2.2 | passive |
| 5 | R3.1 | passive |
| 6 | R3.2 | passive |
| 7 | R4.1 | passive |
| 8 | R4.2 | passive |
| 9 | R5.1 | passive |
| 10 | R5.2 | passive |
| 11 | R6.1 | passive |
| 12 | R6.2 | passive |
Footprint
ConfirmedResistor_THT/R_Array_SIP12
Pad Layout
1
2
3
4
5
6
7
8
9
10
11
12
Pads (12)
| Number | Type |
|---|---|
| 1 | thru hole |
| 2 | thru hole |
| 3 | thru hole |
| 4 | thru hole |
| 5 | thru hole |
| 6 | thru hole |
| 7 | thru hole |
| 8 | thru hole |
| 9 | thru hole |
| 10 | thru hole |
| 11 | thru hole |
| 12 | thru hole |