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DP83848C
MII/RMII Single 10/100Mbps Ethernet Physical Layer Transceiver, LQFP-48
Schematic Symbol
Pin Configuration (43 pins)
| Pin | Name | Type |
|---|---|---|
| 1 | TX_CLK | output |
| 2 | TX_EN | input |
| 3 | TXD_0 | input |
| 4 | TXD_1 | input |
| 5 | TXD_2 | input |
| 6 | TXD_3/SNI_MODE | input |
| 7 | PWR_DOWN/INT | input |
| 13 | RD- | passive |
| 14 | RD+ | passive |
| 15 | AGND | power_in |
| 16 | TD- | passive |
| 17 | TD+ | passive |
| 18 | PFBIN1 | passive |
| 19 | AGND | passive |
| 20 | RESERVED | passive |
| 21 | RESERVED | passive |
| 22 | AVDD33 | power_in |
| 23 | PFBOUT | passive |
| 24 | RBIAS | passive |
| 25 | 25M_OUT | output |
| 26 | AN_EN/LED_ACT/COL | output |
| 27 | AN1/LED_SPEED | output |
| 28 | AN0/LED_LINK | output |
| 29 | ~{RESET} | input |
| 30 | MDIO | bidirectional |
| 31 | MDC | input |
| 32 | IOVDD33 | power_in |
| 33 | X2 | output |
| 34 | X1 | input |
| 35 | IOGND | power_in |
| 36 | DGND | power_in |
| 37 | PFBIN2 | passive |
| 38 | RX_CLK | output |
| 39 | RX_DV/MII_MODE | output |
| 40 | CRS/CRS_DV/LED_CFG | output |
| 41 | RX_ER/MDIX_EN | output |
| 42 | COL/PHY_AD0 | output |
| 43 | RXD_0/PHY_AD1 | output |
| 44 | RXD_1/PHY_AD2 | output |
| 45 | RXD_2/PHY_AD3 | output |
| 46 | RXD_3/PHY_AD4 | output |
| 47 | IOGND | passive |
| 48 | IOVDD33 | passive |
Footprint
ConfirmedPackage_QFP/LQFP-48_7x7mm_P0.5mm
Pad Layout
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Pads (48)
| Number | Type |
|---|---|
| 1 | smd |
| 2 | smd |
| 3 | smd |
| 4 | smd |
| 5 | smd |
| 6 | smd |
| 7 | smd |
| 8 | smd |
| 9 | smd |
| 10 | smd |
| 11 | smd |
| 12 | smd |
| 13 | smd |
| 14 | smd |
| 15 | smd |
| 16 | smd |
| 17 | smd |
| 18 | smd |
| 19 | smd |
| 20 | smd |
| 21 | smd |
| 22 | smd |
| 23 | smd |
| 24 | smd |
| 25 | smd |
| 26 | smd |
| 27 | smd |
| 28 | smd |
| 29 | smd |
| 30 | smd |
| 31 | smd |
| 32 | smd |
| 33 | smd |
| 34 | smd |
| 35 | smd |
| 36 | smd |
| 37 | smd |
| 38 | smd |
| 39 | smd |
| 40 | smd |
| 41 | smd |
| 42 | smd |
| 43 | smd |
| 44 | smd |
| 45 | smd |
| 46 | smd |
| 47 | smd |
| 48 | smd |