68681

dual universal asynchronous receiver/transmitter with parallel port

Schematic Symbol

Pin Configuration (40 pins)

Pin	Name	Type
1	RS1	input
2	IP3	input
3	RS2	input
4	IP1	input
5	RS3	input
6	RS4	input
7	IP0	input
8	R/W	input
9	DTACK	open_collector
10	RXDB	input
11	TXDB	output
12	OP1	output
13	OP3	output
14	OP5	output
15	OP7	output
16	D1	tri_state
17	D3	tri_state
18	D5	tri_state
19	D7	tri_state
20	GND	power_in
21	IRQ	output
22	D6	tri_state
23	D4	tri_state
24	D2	tri_state
25	D0	tri_state
26	OP6	output
27	OP4	output
28	OP2	output
29	OP0	output
30	TXDA	output
31	RXDA	input
32	X1/CLK	input
33	X2	input
34	RESET	input
35	CS	input
36	IP2	input
37	IACK	input
38	IP5	input
39	IP4	input
40	VCC	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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