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LTC6957xDD-3
Low Phase Noise, Dual Output Buffer/Driver/Logic Converter, CMOS In-Phase Outputs, DFN-12
Schematic Symbol
Pin Configuration (13 pins)
| Pin | Name | Type |
|---|---|---|
| 1 | FILTA | input |
| 2 | V+ | power_in |
| 3 | IN+ | input |
| 4 | IN- | input |
| 5 | GND | power_in |
| 6 | FILTB | input |
| 7 | SD2 | input |
| 8 | GNDOUT | output |
| 9 | OUT2 | output |
| 10 | OUT1 | output |
| 11 | VDD | power_in |
| 12 | SD1 | input |
| 13 | GND | passive |
Footprint
ConfirmedPackage_DFN_QFN/DFN-12-1EP_3x3mm_P0.45mm_EP1.65x2.38mm
Pad Layout
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—
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—
1
2
3
4
5
6
7
8
9
10
11
12
13
Pads (17)
| Number | Type |
|---|---|
| — | smd |
| — | smd |
| — | smd |
| — | smd |
| 1 | smd |
| 2 | smd |
| 3 | smd |
| 4 | smd |
| 5 | smd |
| 6 | smd |
| 7 | smd |
| 8 | smd |
| 9 | smd |
| 10 | smd |
| 11 | smd |
| 12 | smd |
| 13 | smd |
