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MC100LVELT22DT

3.3 V Dual LVTTL/LVCMOS to Differential LVPECL Translator, TSSOP-8

Schematic Symbol

MC100LVELT22DTGNDD1D0VCCQ0~{Q0}Q1~{Q1}

Pin Configuration (8 pins)

PinNameType
1Q0output
2~{Q0}output
3Q1output
4~{Q1}output
5GNDpower_in
6D1input
7D0input
8VCCpower_in

Footprint

Confirmed

Package_SO/TSSOP-8_3x3mm_P0.65mm

Pad Layout
1
2
3
4
5
6
7
8
Pads (8)
NumberType
1smd
2smd
3smd
4smd
5smd
6smd
7smd
8smd

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SymbolDownload Library
Footprint

Details

LibraryInterface
Pin Count8
FootprintTSSOP-8_3x3mm_P0.65mm
Pad Count8
View Datasheet