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PEEL22CV10AP
Not in Production, CMOS Programmable Electrically Erasable Logic Device, DIP-24
Schematic Symbol
Pin Configuration (24 pins)
| Pin | Name | Type |
|---|---|---|
| 12 | GND | power_in |
| 24 | VCC | power_in |
| 1 | I1/CLK | input |
| 2 | I2 | input |
| 3 | I3 | input |
| 4 | I4 | input |
| 5 | I5 | input |
| 6 | I6 | input |
| 7 | I7 | input |
| 8 | I8 | input |
| 9 | I9 | input |
| 10 | I10 | input |
| 11 | I11 | input |
| 13 | I13 | input |
| 14 | IO14 | tri_state |
| 15 | IO15 | tri_state |
| 16 | IO16 | tri_state |
| 17 | IO17 | tri_state |
| 18 | IO18 | tri_state |
| 19 | IO19 | tri_state |
| 20 | IO20 | tri_state |
| 21 | IO21 | tri_state |
| 22 | IO22 | tri_state |
| 23 | IO23 | tri_state |
Footprint
ConfirmedPackage_DIP/DIP-24_W7.62mm
Pad Layout
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Pads (24)
| Number | Type |
|---|---|
| 1 | thru hole |
| 2 | thru hole |
| 3 | thru hole |
| 4 | thru hole |
| 5 | thru hole |
| 6 | thru hole |
| 7 | thru hole |
| 8 | thru hole |
| 9 | thru hole |
| 10 | thru hole |
| 11 | thru hole |
| 12 | thru hole |
| 13 | thru hole |
| 14 | thru hole |
| 15 | thru hole |
| 16 | thru hole |
| 17 | thru hole |
| 18 | thru hole |
| 19 | thru hole |
| 20 | thru hole |
| 21 | thru hole |
| 22 | thru hole |
| 23 | thru hole |
| 24 | thru hole |