10CL006YE144

Cyclone 10 CL Family FPGA, 6272 Logic Elements, 144-Pin EQFN, Speed Grade 8, Operating Temperature (0°C to 85°C), RoHS6-Compliant

Schematic Symbol

Pin Configuration (145 pins)

Pin	Name	Type
38	IO/DIFFIO_B1p	bidirectional
39	IO/DIFFIO_B1n	bidirectional
49	IO/DIFFIO_B9p	bidirectional
50	IO/DIFFIO_B9n	bidirectional
51	IO/DIFFIO_B10p	bidirectional
52	IO/DIFFIO_B11p	bidirectional
53	IO/DIFFIO_B11n	bidirectional
54	IO/DIFFIO_B12p	bidirectional
55	IO/DIFFIO_B12n	bidirectional
58	IO/DIFFIO_B15p	bidirectional
59	IO/DIFFIO_B16p	bidirectional
60	IO/DIFFIO_B16n	bidirectional
68	IO/DPCLK3/DIFFIO_B20n	bidirectional
70	IO/DIFFIO_B21p	bidirectional
71	IO/DIFFIO_B21n	bidirectional
72	IO/DIFFIO_B22p	bidirectional
6	IO/DATA1/ASDO/DIFFIO_L1n	bidirectional
8	IO/FLASH_nCE/nCSO/DIFFIO_L2p	bidirectional
10	IO/DPCLK0/DIFFIO_L4p	bidirectional
11	IO/DIFFIO_L4n	bidirectional
28	IO/DIFFIO_L6n	bidirectional
106	IO/DIFFIO_R1n	bidirectional
103	IO/CLKUSR/DIFFIO_R3p	bidirectional
101	IO/nCEO/DIFFIO_R3n	bidirectional
99	IO/CRC_ERROR/DIFFIO_R4p	bidirectional
98	IO/INIT_DONE/DIFFIO_R4n	bidirectional
87	IO/DEV_CLRn/DIFFIO_R7p	bidirectional
86	IO/DEV_OE/DIFFIO_R7n	bidirectional
85	IO/DPCLK4/DIFFIO_R8p	bidirectional
84	IO/DIFFIO_R8n	bidirectional
144	IO/DIFFIO_T1p	bidirectional
143	IO/DIFFIO_T1n	bidirectional
142	IO/DPCLK7/DIFFIO_T2p	bidirectional
141	IO/DIFFIO_T5p	bidirectional
135	IO/DIFFIO_T8n	bidirectional
133	IO/DATA3/DIFFIO_T10p	bidirectional
132	IO/DATA2/DIFFIO_T10n	bidirectional
129	IO/DIFFIO_T11p	bidirectional
128	IO/DIFFIO_T11n	bidirectional
127	IO/DIFFIO_T12p	bidirectional
126	IO/DIFFIO_T12n	bidirectional
124	IO/DIFFIO_T13p	bidirectional
121	IO/DIFFIO_T16p	bidirectional
120	IO/DIFFIO_T16n	bidirectional
111	IO/DIFFIO_T19p	bidirectional
1	IO	bidirectional
2	IO	bidirectional
3	IO	bidirectional
34	IO	bidirectional
69	IO	bidirectional
73	IO	bidirectional
74	IO	bidirectional
75	IO	bidirectional
83	IO	bidirectional
100	IO	bidirectional
125	IO	bidirectional
7	IO/VREFB1N0	bidirectional
31	IO/VREFB2N0	bidirectional
46	IO/VREFB3N0	bidirectional
65	IO/VREFB4N0	bidirectional
80	IO/VREFB5N0	bidirectional
105	IO/VREFB6N0	bidirectional
119	IO/VREFB7N0	bidirectional
136	IO/VREFB8N0	bidirectional
13	IO/DATA0	bidirectional
137	IO/DATA5	bidirectional
138	IO/DATA6	bidirectional
21	nCE	input
12	IO/DCLK	input
92	CONF_DONE	input
9	nSTATUS	input
14	nCONFIG	input
22	DIFFCLK_0p	input
23	DIFFCLK_0n	input
24	DIFFCLK_1p	input
25	DIFFCLK_1n	input
91	DIFFCLK_2p	input
90	DIFFCLK_2n	input
89	DIFFCLK_3p	input
88	DIFFCLK_3n	input
42	IO/DPCLK2	bidirectional
43	IO/PLL1_CLKOUTp	bidirectional
44	IO/PLL1_CLKOUTn	bidirectional
113	IO/PLL2_CLKOUTp	bidirectional
112	IO/PLL2_CLKOUTn	bidirectional
94	MSEL0	bidirectional
96	MSEL1	bidirectional
97	MSEL2	bidirectional
20	TDO	output
18	TMS	input
16	TCK	input
15	TDI	input
32	IO/RUP1	bidirectional
33	IO/RDN1	bidirectional
66	IO/RUP2	bidirectional
67	IO/RDN2	bidirectional
76	IO/RUP3	bidirectional
77	IO/RDN3	bidirectional
114	IO/RUP4	bidirectional
115	IO/RDN4	bidirectional
17	VCCIO1	power_in
26	VCCIO2	power_in
40	VCCIO3	power_in
47	VCCIO3	power_in
56	VCCIO4	power_in
62	VCCIO4	power_in
81	VCCIO5	power_in
93	VCCIO6	power_in
117	VCCIO7	power_in
122	VCCIO7	power_in
130	VCCIO8	power_in
139	VCCIO8	power_in
5	VCCINT	power_in
29	VCCINT	power_in
45	VCCINT	power_in
61	VCCINT	power_in
78	VCCINT	power_in
102	VCCINT	power_in
116	VCCINT	power_in
134	VCCINT	power_in
35	VCCA1	power_in
107	VCCA2	power_in
37	VCCD_PLL1	power_in
109	VCCD_PLL2	power_in
4	GND	power_in
19	GND	power_in
27	GND	power_in
30	GND	power_in
41	GND	power_in
48	GND	power_in
57	GND	power_in
63	GND	power_in
64	GND	power_in
79	GND	power_in
82	GND	power_in
95	GND	power_in
104	GND	power_in
110	GND	power_in
118	GND	power_in
123	GND	power_in
131	GND	power_in
140	GND	power_in
145	GND	power_in
36	GNDA1	power_in
108	GNDA2	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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10CL006YE144

Schematic Symbol

Pin Configuration (145 pins)

Footprint

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