AD9512

1.2 GHz Clock Distribution IC, 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs

Schematic Symbol

Pin Configuration (49 pins)

Pin	Name	Type
10	CLK1	input
11	CLK1B	input
7	CLK2	input
8	CLK2B	input
1	DSYNC	input
2	DSYNCB	input
14	SCLK	input
17	CSB	input
15	SDIO	bidirectional
16	SDO	output
12	FUNCTION	input
13	STATUS	output
45	RSET	input
3	VS	power_in
4	VS	power_in
6	VS	power_in
9	VS	power_in
18	VS	power_in
22	VS	power_in
23	VS	power_in
25	VS	power_in
28	VS	power_in
29	VS	power_in
32	VS	power_in
33	VS	power_in
36	VS	power_in
39	VS	power_in
40	VS	power_in
44	VS	power_in
47	VS	power_in
48	VS	power_in
42	OUT0	output
41	OUT0B	output
27	OUT1	output
26	OUT1B	output
21	OUT2	output
20	OUT2B	output
35	OUT3	output
34	OUT3B	output
31	OUT4	output
30	OUT4B	output
5	DNC	passive
19	GND	power_in
24	GND	power_in
37	GND	power_in
38	GND	power_in
43	GND	power_in
46	GND	power_in
49	EP	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

Comments

Loading comments...

Sign in to leave a comment.