AD9513

800 MHz Clock distribution IC, dividers, Delay Adjust, Three Outputs

Schematic Symbol

Pin Configuration (33 pins)

Pin	Name	Type
2	CLK	input
3	~{CLK}	input
5	~{SYNKB}	input
32	RSET	input
6	VREF	input
1	VS	power_in
4	VS	power_in
17	VS	power_in
20	VS	power_in
21	VS	power_in
24	VS	power_in
26	VS	power_in
29	VS	power_in
30	VS	power_in
27	~{OUT0}	output
28	OUT0	output
22	~{OUT1}	output
23	OUT1	output
18	~{OUT2}	output
19	OUT2	output
7	S10	input
8	S9	input
9	S8	input
10	S7	input
11	S6	input
12	S5	input
13	S4	input
14	S3	input
15	S2	input
16	S1	input
25	S0	input
31	GND	power_in
33	EP	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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