AD9528

Clock Generator with 14 LVDS/HSTL Outputs

Schematic Symbol

Pin Configuration (73 pins)

Pin	Name	Type
2	REFA	input
3	~{REFA}	input
4	REF_SEL	input
5	REFB	input
6	~{REFB}	input
70	SYSREF_IN	input
71	~{SYSREF_IN}	input
57	SYSREF_REQ	input
24	SDO	output
23	SDIO/SDA	bidirectional
22	SCLK/SCL	input
21	~{CS}	input
19	~{RESET}	input
55	STATUS0/SP0	bidirectional
56	STATUS1/SP1	bidirectional
11	VCXO_IN	input
12	~{VCXO_IN}	input
8	VCXO_VT	output
7	LF1	output
14	LF2_CAP	output
15	LDO_VCO	power_in
9	NIC	passive
13	NIC	passive
17	NIC	passive
18	NIC	passive
67	OUT0	output
68	~{OUT0}	output
64	OUT1	output
65	~{OUT1}	output
62	~{OUT2}	output
61	OUT2	output
58	OUT3	output
59	~{OUT3}	output
52	OUT4	output
53	~{OUT4}	output
49	OUT5	output
50	~{OUT5}	output
46	OUT6	output
47	~{OUT6}	output
43	OUT7	output
44	~{OUT7}	output
40	OUT8	output
41	~{OUT8}	output
37	OUT9	output
38	~{OUT9}	output
34	OUT10	output
35	~{OUT10}	output
31	OUT11	output
32	~{OUT11}	output
28	OUT12	output
29	~{OUT12}	output
25	OUT13	output
26	~{OUT13}	output
69	VDD0	power_in
66	VDD1	power_in
63	VDD2	power_in
60	VDD3	power_in
54	VDD4	power_in
51	VDD5	power_in
48	VDD6	power_in
45	VDD7	power_in
42	VDD8	power_in
39	VDD9	power_in
36	VDD10	power_in
33	VDD11	power_in
30	VDD12	power_in
27	VDD13	power_in
1	VDD	power_in
10	VDD	power_in
16	VDD	power_in
20	VDD	power_in
72	VDD	power_in
73	EP(GND)	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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