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AD9576
Asynchronous Clock Generator
Schematic Symbol
Pin Configuration (65 pins)
| Pin | Name | Type |
|---|---|---|
| 7 | REF0 | input |
| 8 | ~{REF0} | input |
| 12 | REF1 | input |
| 11 | ~{REF1} | input |
| 2 | REF2 | input |
| 1 | ~{REF2} | input |
| 55 | REF_STATUS | output |
| 3 | REF_SEL | input |
| 5 | REF_ACT | output |
| 6 | REF_SW | output |
| 17 | LD_0 | output |
| 62 | LD_1 | output |
| 24 | PPR0 | input |
| 26 | PPR1 | input |
| 32 | PPR2 | input |
| 56 | PPR3 | input |
| 15 | SDIO/SDA | bidirectional |
| 14 | SCLK/SCL | input |
| 13 | ~{CS} | input |
| 63 | ~{RESET} | input |
| 49 | SP0 | bidirectional |
| 22 | SP1 | bidirectional |
| 19 | LF | input |
| 20 | LDO_BYP | input |
| 4 | VDD_REFMON | power_in |
| 9 | VDD_REF0 | power_in |
| 10 | VDD_REF1 | power_in |
| 64 | VDD_REF2 | power_in |
| 21 | VDD_VCO0 | power_in |
| 60 | VDD_VCO1 | power_in |
| 16 | VDD_IO | power_in |
| 18 | VDD_PLL0 | power_in |
| 61 | VDD_PLL1 | power_in |
| 48 | OUT0 | output |
| 47 | ~{OUT0} | output |
| 44 | OUT1 | output |
| 45 | ~{OUT1} | output |
| 43 | OUT2 | output |
| 42 | ~{OUT2} | output |
| 40 | ~{OUT3} | output |
| 39 | OUT3 | output |
| 37 | OUT4 | output |
| 36 | ~{OUT4} | output |
| 33 | OUT5 | output |
| 34 | ~{OUT5} | output |
| 31 | OUT6 | output |
| 30 | ~{OUT6} | output |
| 27 | OUT7 | output |
| 28 | ~{OUT7} | output |
| 50 | OUT8 | output |
| 51 | ~{OUT8} | output |
| 54 | OUT9 | output |
| 53 | ~{OUT9} | output |
| 58 | OUT10 | output |
| 59 | ~{OUT10} | output |
| 23 | VDD_M0 | power_in |
| 25 | VDD_M1 | power_in |
| 46 | VDD_OUT01 | power_in |
| 41 | VDD_OUT23 | power_in |
| 35 | VDD_OUT45 | power_in |
| 29 | VDD_OUT67 | power_in |
| 52 | VDD_OUT89 | power_in |
| 57 | VDD_OUT10 | power_in |
| 38 | GND | power_in |
| 65 | EP(GND) | power_in |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.
