ADG3123

8-Channel CMOS Logic to High Voltage Level Translator

Schematic Symbol

Pin Configuration (20 pins)

Pin	Name	Type
2	A1	input
3	A2	input
4	A3	input
5	A4	input
6	A5	input
7	A6	input
8	A7	input
9	A8	input
10	VSS	power_in
1	GND	power_in
19	Y1	output
18	Y2	output
17	Y3	output
16	Y4	output
15	Y5	output
14	Y6	output
13	Y7	output
12	Y8	output
20	VDDA	power_in
11	VDDB	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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