CDCE62005RGZT

5/10 Outputs Clock Generator/Jitter Cleaner with Integrated Dual VCO

Schematic Symbol

Pin Configuration (49 pins)

Pin	Name	Type
45	PRI_REF+	input
46	PRI_REF-	input
48	VBB	output
3	SEC_REF+	input
2	SEC_REF-	input
43	AUX_IN	input
40	EXT_LFP	input
41	EXT_LFN	input
4	REG_CAP1	passive
38	REG_CAP2	passive
30	TESTOUTA	output
33	TEST_MODE	input
31	REF_SEL	input
12	~{POWER_DOWN}	input
14	~{SYNC}	input
37	PLL_LOCK	output
25	SPI_LE	input
24	SPI_CLK	input
23	SPI_MOSI	input
22	SPI_MISO	output
47	VCC_IN_PRI	power_in
1	VCC_IN_SEC	power_in
44	VCC_AUXIN	power_in
5	VCC1_PLL	power_in
42	VCC2_PLL	power_in
39	VCC2_PLL	power_in
27	U0P	output
28	U0N	output
19	U1P	output
20	U1N	output
16	U2P	output
17	U2N	output
9	U3P	output
10	U3N	output
6	U4P	output
7	U4N	output
13	AUX_OUT	output
15	VCC_AUXOUT	power_in
32	VCC_OUT	power_in
29	VCC_OUT	power_in
26	VCC_OUT	power_in
21	VCC_OUT	power_in
18	VCC_OUT	power_in
11	VCC_OUT	power_in
8	VCC_OUT	power_in
35	VCC_VCO	power_in
34	VCC_VCO	power_in
36	GND_VCO	power_in
49	EP	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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