CDCE72010

Ten Output High Performance Clock Synchronizer, Jitter Cleaner, and Clock Distributor

Schematic Symbol

Pin Configuration (65 pins)

Pin	Name	Type
59	PRI_REF+	input
58	PRI_REF-	input
62	SEC_REF+	input
61	SEC_REF-	input
53	VCXO_IN+	input
52	VCXO_IN-	input
56	VBB	output
3	CP_OUT	output
50	PLL_LOCK	output
47	REF_SEL	input
17	~{PD}	input
33	~{RESET}	input
16	MODE_SEL	input
18	AUX_SEL	input
15	SPI_MISO	output
45	SPI_LE	input
46	SPI_CLK	input
44	SPI_MOSI	input
48	VCCA	power_in
49	VCCA	power_in
51	VCC_VCXO	power_in
54	VCC_VCXO	power_in
57	VCC_IN	power_in
60	VCC_IN	power_in
4	VCC_PLL	power_in
63	VCC_PLL	power_in
64	VCC_CP	power_in
2	GND_CP	power_in
55	STATUS	output
7	U0P	output
6	U0N	output
10	U1P	output
9	U1N	output
13	U2P	output
12	U2N	output
21	U3P	output
20	U3N	output
24	U4P	output
23	U4N	output
27	U5P	output
26	U5N	output
30	U6P	output
29	U6N	output
36	U7P	output
35	U7N	output
39	U8P	output
38	U8N	output
42	U9P	output
41	U9N	output
1	TESTOUTA	passive
5	VCC	power_in
8	VCC	power_in
11	VCC	power_in
14	VCC	power_in
19	VCC	power_in
22	VCC	power_in
25	VCC	power_in
28	VCC	power_in
31	VCC	power_in
34	VCC	power_in
37	VCC	power_in
40	VCC	power_in
43	VCC	power_in
32	GND	power_in
65	EP	power_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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