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CDCLVC1102PW
3.3 V and 2.5 V LVCMOS 1:2 High-Performance Clock Buffer
Schematic Symbol
Pin Configuration (6 pins)
| Pin | Name | Type |
|---|---|---|
| 1 | CLKIN | input |
| 2 | 1G | input |
| 6 | VDD | power_in |
| 3 | Y0 | output |
| 8 | Y1 | output |
| 4 | GND | power_in |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.