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EP2C8F256C6N
Cyclone II Family, 1.2V FPGA, 182 I/O Pins, 2 PLLs, 256-Pin FBGA, Speed Grade 6, Commercial Grade, Pb-Free
Schematic Symbol
Pin Configuration (256 pins)
| Pin | Name | Type |
|---|---|---|
| C3 | IO,_(ASDO) | bidirectional |
| F4 | IO,_(nCSO) | bidirectional |
| C1 | IO,_LVDS15p_(CRC_ERROR) | bidirectional |
| C2 | IO,_LVDS15n_(CLKUSR) | bidirectional |
| D5 | IO,_LVDS14p | bidirectional |
| E5 | IO,_LVDS14n | bidirectional |
| F5 | IO,_LVDS13p | bidirectional |
| D3 | IO,_LVDS12p,_DQ0L0/DQ1L0 | bidirectional |
| D4 | IO,_LVDS12n,_DQ0L1/DQ1L1 | bidirectional |
| F3 | IO,_VREFB1N0 | bidirectional |
| D2 | IO,_LVDS11p | bidirectional |
| D1 | IO,_LVDS11n,_DQ0L2/DQ1L2 | bidirectional |
| E3 | IO,_LVDS10p,_DQ0L3/DQ1L3 | bidirectional |
| E4 | IO,_LVDS10n,_DQ0L4/DQ1L4 | bidirectional |
| G4 | IO | bidirectional |
| J6 | IO,_LVDS9p | bidirectional |
| H6 | IO,_LVDS9n | bidirectional |
| E1 | IO,_LVDS8p,_(DPCLK0/DQS0L)/(DPCLK0/DQS0L) | bidirectional |
| E2 | IO,_LVDS8n,_DQ0L5/DQ1L5 | bidirectional |
| K2 | IO,_LVDS7p,_(DPCLK1/DQS1L)/(DPCLK1/DQS1L) | bidirectional |
| K1 | IO,_LVDS7n,_DQ0L6/DQ1L6 | bidirectional |
| K4 | IO,_LVDS6p,_DQ0L7/DQ1L7 | bidirectional |
| K5 | IO,_LVDS6n,__/DQ1L8 | bidirectional |
| L1 | IO,_LVDS5p,_DM0L/(DM1L0/BWS#1L0) | bidirectional |
| L2 | IO,_LVDS5n,_DQ1L0/DQ1L9 | bidirectional |
| J4 | IO,_VREFB1N1 | bidirectional |
| M1 | IO,_LVDS4p | bidirectional |
| M2 | IO,_LVDS4n,_DQ1L1/DQ1L10 | bidirectional |
| M3 | IO,_LVDS3p,_DQ1L2/DQ1L11 | bidirectional |
| L3 | IO,_LVDS3n | bidirectional |
| N1 | IO,_LVDS2p,_DQ1L3/DQ1L12 | bidirectional |
| N2 | IO,_LVDS2n,_DQ1L4/DQ1L13 | bidirectional |
| P1 | IO,_LVDS1p,_DQ1L5/DQ1L14 | bidirectional |
| P2 | IO,_LVDS1n,_DQ1L6/DQ1L15 | bidirectional |
| N3 | IO,_LVDS0p,_DQ1L7/DQ1L16 | bidirectional |
| N4 | IO,_LVDS0n,_DQ1L8/DQ1L17 | bidirectional |
| P3 | IO,_(DM1L/BWS#1L)/(DM1L1/BWS#1L1) | bidirectional |
| L4 | IO,_PLL1_OUTp | bidirectional |
| M4 | IO,_PLL1_OUTn | bidirectional |
| B14 | IO,_LVDS37n | bidirectional |
| A14 | IO,_LVDS37p,_DQ0T0/DQ1T0 | bidirectional |
| C13 | IO,_LVDS36n,_DQ0T1/DQ1T1 | bidirectional |
| C12 | IO,_LVDS36p,_DQ0T2/DQ1T2 | bidirectional |
| B13 | IO,_LVDS35n,_DQ0T3/DQ1T3 | bidirectional |
| A13 | IO,_LVDS35p,_DQ0T4/DQ1T4 | bidirectional |
| B12 | IO,_LVDS34n,_DQ0T5/DQ1T5 | bidirectional |
| A12 | IO,_LVDS34p,_(DPCLK8/DQS0T)/(DPCLK8/DQS0T) | bidirectional |
| C11 | IO,_VREFB2N0 | bidirectional |
| B11 | IO,_LVDS33n,_DQ0T6/DQ1T6 | bidirectional |
| A11 | IO,_LVDS33p,_DQ0T7/DQ1T7 | bidirectional |
| G10 | IO,_LVDS32n | bidirectional |
| G11 | IO,_LVDS32p | bidirectional |
| B10 | IO,_LVDS31n,__/DQ1T8 | bidirectional |
| A10 | IO,_LVDS31p | bidirectional |
| F10 | IO,_LVDS30n | bidirectional |
| F9 | IO,_LVDS30p | bidirectional |
| D9 | IO | bidirectional |
| D11 | IO,_LVDS29n,_DM0T/(DM1T0/BWS#1T0) | bidirectional |
| D10 | IO,_LVDS29p | bidirectional |
| A9 | IO,_LVDS28n | bidirectional |
| B9 | IO,_LVDS28p | bidirectional |
| A8 | IO,_LVDS27n | bidirectional |
| B8 | IO,_LVDS27p | bidirectional |
| A7 | IO,_LVDS26n,_DQ1T0/DQ1T9 | bidirectional |
| B7 | IO,_LVDS26p | bidirectional |
| F7 | IO,_LVDS25n | bidirectional |
| F8 | IO,_LVDS25p | bidirectional |
| D8 | IO,_VREFB2N1 | bidirectional |
| B6 | IO,_LVDS23n,_DQ1T1/DQ1T10 | bidirectional |
| A6 | IO,_LVDS23p | bidirectional |
| G6 | IO,_LVDS22n | bidirectional |
| G7 | IO,_LVDS22p | bidirectional |
| D7 | IO,_DQ1T2/DQ1T11 | bidirectional |
| D6 | IO,_LVDS21n,_DQ1T3/DQ1T12 | bidirectional |
| C6 | IO,_LVDS21p,_DQ1T4/DQ1T13 | bidirectional |
| C5 | IO,_LVDS20n | bidirectional |
| C4 | IO,_LVDS20p,_DQ1T5/DQ1T14 | bidirectional |
| B5 | IO,_LVDS19n,_DQ1T6/DQ1T15 | bidirectional |
| A5 | IO,_LVDS19p,_(DPCLK10/DQS1T)/(DPCLK10/DQS1T) | bidirectional |
| B4 | IO,_LVDS18n,_DQ1T7/DQ1T16 | bidirectional |
| A4 | IO,_LVDS18p,_DQ1T8/DQ1T17 | bidirectional |
| A3 | IO,_LVDS17p,_(DM1T/BWS#1T)/(DM1T1/BWS#1T1) | bidirectional |
| B3 | IO,_LVDS17n_(DEV_CLRn) | bidirectional |
| E6 | IO,_LVDS16p | bidirectional |
| F6 | IO,_LVDS16n | bidirectional |
| N12 | IO,_LVDS56n | bidirectional |
| M12 | IO,_LVDS56p | bidirectional |
| L12 | IO,_LVDS55n | bidirectional |
| K13 | IO,_LVDS55p | bidirectional |
| N13 | IO,_LVDS54n_(INIT_DONE) | bidirectional |
| N14 | IO,_LVDS54p_(nCEO) | bidirectional |
| P15 | IO,_LVDS53n,_(DM1R/BWS#1R)/(DM1R1/BWS#1R1) | bidirectional |
| P16 | IO,_LVDS53p,_DQ1R8/DQ1R17 | bidirectional |
| N15 | IO,_LVDS52n,_DQ1R7/DQ1R16 | bidirectional |
| N16 | IO,_LVDS52p,_DQ1R6/DQ1R15 | bidirectional |
| P14 | IO,_DQ1R5/DQ1R14 | bidirectional |
| M14 | IO,_VREFB3N1 | bidirectional |
| M15 | IO,_LVDS50n,_DQ1R4/DQ1R13 | bidirectional |
| M16 | IO,_LVDS50p | bidirectional |
| L14 | IO | bidirectional |
| L15 | IO,_LVDS49n,_DQ1R3/DQ1R12 | bidirectional |
| L16 | IO,_LVDS49p,_DQ1R2/DQ1R11 | bidirectional |
| K16 | IO,_LVDS48n,_DQ1R1/DQ1R10 | bidirectional |
| K15 | IO,_LVDS48p,_(DPCLK6/DQS1R)/(DPCLK6/DQS1R) | bidirectional |
| H12 | IO,_LVDS47n,_DQ1R0/DQ1R9 | bidirectional |
| J12 | IO,_LVDS47p,_(DPCLK7/DQS0R)/(DPCLK7/DQS0R) | bidirectional |
| G16 | IO,_LVDS46n,_DM0R/(DM1R0/BWS#1R0) | bidirectional |
| G15 | IO,_LVDS46p,__/DQ1R8 | bidirectional |
| F15 | IO,_LVDS45n,_DQ0R7/DQ1R7 | bidirectional |
| F16 | IO,_LVDS45p,_DQ0R6/DQ1R6 | bidirectional |
| J11 | IO,_LVDS44n | bidirectional |
| H11 | IO,_LVDS44p | bidirectional |
| G12 | IO,_LVDS43n,_DQ0R5/DQ1R5 | bidirectional |
| G13 | IO,_LVDS43p,_DQ0R4/DQ1R4 | bidirectional |
| E13 | IO,_LVDS42n,_DQ0R3/DQ1R3 | bidirectional |
| F13 | IO,_LVDS42p,_DQ0R2/DQ1R2 | bidirectional |
| H13 | IO,_VREFB3N0 | bidirectional |
| D15 | IO,_LVDS41n | bidirectional |
| D16 | IO,_LVDS41p | bidirectional |
| E15 | IO,_LVDS40n,_DQ0R1/DQ1R1 | bidirectional |
| E16 | IO,_LVDS40p,_DQ0R0/DQ1R0 | bidirectional |
| F14 | IO | bidirectional |
| C15 | IO,_LVDS39n | bidirectional |
| C16 | IO,_LVDS39p | bidirectional |
| C14 | IO,_LVDS38n | bidirectional |
| D13 | IO,_LVDS38p | bidirectional |
| E14 | IO,_PLL2_OUTp | bidirectional |
| D14 | IO,_PLL2_OUTn | bidirectional |
| R3 | IO,_LVDS77n_(DEV_OE) | bidirectional |
| T3 | IO,_LVDS77p,_(DM1B/BWS#1B)/(DM1B1/BWS#1B1) | bidirectional |
| P5 | IO,_LVDS76p,_DQ1B8/DQ1B17 | bidirectional |
| P4 | IO,_LVDS76n,_DQ1B7/DQ1B16 | bidirectional |
| T4 | IO,_LVDS75p,_DQ1B6/DQ1B15 | bidirectional |
| R4 | IO,_LVDS75n,_DQ1B5/DQ1B14 | bidirectional |
| T5 | IO,_LVDS74p,_(DPCLK2/DQS1B)/(DPCLK2/DQS1B) | bidirectional |
| R5 | IO,_LVDS74n,_DQ1B4/DQ1B13 | bidirectional |
| N7 | IO | bidirectional |
| K7 | IO,_LVDS73p | bidirectional |
| K6 | IO,_LVDS73n | bidirectional |
| T6 | IO,_LVDS72p | bidirectional |
| R6 | IO,_LVDS72n | bidirectional |
| P6 | IO,_LVDS71p,_DQ1B3/DQ1B12 | bidirectional |
| N6 | IO,_LVDS71n,_DQ1B2/DQ1B11 | bidirectional |
| N8 | IO,_VREFB4N1 | bidirectional |
| T7 | IO,_LVDS70p,_DQ1B1/DQ1B10 | bidirectional |
| R7 | IO,_LVDS70n,_DQ1B0/DQ1B9 | bidirectional |
| L7 | IO,_LVDS69p | bidirectional |
| L8 | IO,_LVDS69n | bidirectional |
| T8 | IO,_LVDS68p | bidirectional |
| R8 | IO,_LVDS68n,__/(DM1B0/BWS#1B0) | bidirectional |
| T9 | IO,_LVDS67p | bidirectional |
| R9 | IO,_LVDS67n | bidirectional |
| N9 | IO,_LVDS66p | bidirectional |
| N10 | IO,_LVDS66n | bidirectional |
| T11 | IO,_LVDS65p | bidirectional |
| R11 | IO,_LVDS65n,_DM0B/DQ1B8 | bidirectional |
| P11 | IO | bidirectional |
| L9 | IO,_LVDS64p | bidirectional |
| L10 | IO,_LVDS64n | bidirectional |
| R10 | IO,_LVDS63p | bidirectional |
| T10 | IO,_LVDS63n,_DQ0B7/DQ1B7 | bidirectional |
| K11 | IO,_LVDS62p | bidirectional |
| K10 | IO,_LVDS62n | bidirectional |
| N11 | IO,_VREFB4N0 | bidirectional |
| P12 | IO,_LVDS61p,_DQ0B6/DQ1B6 | bidirectional |
| P13 | IO,_LVDS61n,_DQ0B5/DQ1B5 | bidirectional |
| T12 | IO,_LVDS60p,_(DPCLK4/DQS0B)/(DPCLK4/DQS0B) | bidirectional |
| R12 | IO,_LVDS60n,_DQ0B4/DQ1B4 | bidirectional |
| T13 | IO,_LVDS59p,_DQ0B3/DQ1B3 | bidirectional |
| R13 | IO,_LVDS59n,_DQ0B2/DQ1B2 | bidirectional |
| T14 | IO,_LVDS58p,_DQ0B1/DQ1B1 | bidirectional |
| R14 | IO,_LVDS58n,_DQ0B0/DQ1B0 | bidirectional |
| M11 | IO,_LVDS57p | bidirectional |
| L11 | IO,_LVDS57n | bidirectional |
| H5 | TDI | input |
| G2 | TDO | output |
| F2 | TCK | input |
| G1 | TMS | input |
| F1 | DATA0 | input |
| J13 | MSEL0 | input |
| K12 | MSEL1 | input |
| G5 | nCE | input |
| H4 | DCLK | bidirectional |
| L13 | CONF_DONE | bidirectional |
| J5 | nCONFIG | input |
| M13 | nSTATUS | bidirectional |
| B1 | VCCIO1 | power_in |
| G3 | VCCIO1 | power_in |
| K3 | VCCIO1 | power_in |
| R1 | VCCIO1 | power_in |
| A2 | VCCIO2 | power_in |
| A15 | VCCIO2 | power_in |
| C7 | VCCIO2 | power_in |
| C10 | VCCIO2 | power_in |
| E7 | VCCIO2 | power_in |
| E10 | VCCIO2 | power_in |
| B16 | VCCIO3 | power_in |
| G14 | VCCIO3 | power_in |
| K14 | VCCIO3 | power_in |
| R16 | VCCIO3 | power_in |
| M7 | VCCIO4 | power_in |
| M10 | VCCIO4 | power_in |
| P7 | VCCIO4 | power_in |
| P10 | VCCIO4 | power_in |
| T2 | VCCIO4 | power_in |
| T15 | VCCIO4 | power_in |
| G9 | VCCINT | power_in |
| H7 | VCCINT | power_in |
| H10 | VCCINT | power_in |
| J7 | VCCINT | power_in |
| J10 | VCCINT | power_in |
| K8 | VCCINT | power_in |
| G8 | GND | power_in |
| H8 | GND | power_in |
| H9 | GND | power_in |
| J8 | GND | power_in |
| J9 | GND | power_in |
| K9 | GND | power_in |
| A1 | GND | power_in |
| A16 | GND | power_in |
| B2 | GND | power_in |
| B15 | GND | power_in |
| C8 | GND | power_in |
| C9 | GND | power_in |
| E8 | GND | power_in |
| E9 | GND | power_in |
| H3 | GND | power_in |
| H14 | GND | power_in |
| J3 | GND | power_in |
| J14 | GND | power_in |
| M8 | GND | power_in |
| M9 | GND | power_in |
| P8 | GND | power_in |
| P9 | GND | power_in |
| R2 | GND | power_in |
| R15 | GND | power_in |
| T1 | GND | power_in |
| T16 | GND | power_in |
| M5 | VCCA_PLL1 | power_in |
| L6 | VCCD_PLL1 | power_in |
| E12 | VCCA_PLL2 | power_in |
| F11 | VCCD_PLL2 | power_in |
| M6 | GNDA_PLL1 | power_in |
| N5 | GND_PLL1 | power_in |
| L5 | GND_PLL1 | power_in |
| E11 | GNDA_PLL2 | power_in |
| D12 | GND_PLL2 | power_in |
| F12 | GND_PLL2 | power_in |
| J16 | CLK7,_LVDSCLK3n_INPUT | input |
| J15 | CLK6,_LVDSCLK3p_INPUT | input |
| H15 | CLK5,_LVDSCLK2n_INPUT | input |
| H16 | CLK4,_LVDSCLK2p_INPUT | input |
| J1 | CLK3,_LVDSCLK1n_INPUT | input |
| J2 | CLK2,_LVDSCLK1p_INPUT | input |
| H1 | CLK1,_LVDSCLK0n_INPUT | input |
| H2 | CLK0,_LVDSCLK0p_INPUT | input |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.
