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EP4CE6F17C8
Cyclone IV E Family, FPGA, 6272 LEs, 179 I/Os, 256-Pin FBGA, Commercial Grade, Speed Grade 8
Schematic Symbol
Pin Configuration (256 pins)
| Pin | Name | Type |
|---|---|---|
| D4 | IO | bidirectional |
| E5 | IO | bidirectional |
| F5 | IO | bidirectional |
| B1 | IO,_(DQS2L/CQ3L)/(DQS2L/CQ3L) | bidirectional |
| C2 | IO,_DIFFIO_L1p | bidirectional |
| C1 | IO,_DIFFIO_L1n,_(DATA1,ASDO) | bidirectional |
| F3 | IO,_VREFB1N0 | bidirectional |
| D2 | IO,_DIFFIO_L2p,_(FLASH_nCE,nCSO) | bidirectional |
| D1 | IO,_DIFFIO_L2n | bidirectional |
| G5 | IO | bidirectional |
| F2 | IO,_DIFFIO_L3p | bidirectional |
| F1 | IO,_DIFFIO_L3n | bidirectional |
| G2 | IO,_DIFFIO_L4p,_(DQS0L/CQ1L,DPCLK0)/(DQS0L/CQ1L,DPCLK0) | bidirectional |
| G1 | IO,_DIFFIO_L4n | bidirectional |
| H2 | IO,_(DATA0) | bidirectional |
| J2 | IO,_DIFFIO_L5p,_(DQ1L) | bidirectional |
| J1 | IO,_DIFFIO_L5n,_(DQ1L) | bidirectional |
| J6 | IO | bidirectional |
| K6 | IO,_DIFFIO_L6p | bidirectional |
| L6 | IO,_DIFFIO_L6n | bidirectional |
| K2 | IO,_DIFFIO_L7p | bidirectional |
| K1 | IO,_DIFFIO_L7n,_(DQ1L) | bidirectional |
| L2 | IO,_DIFFIO_L8p,_(DQS1L/CQ1L#,DPCLK1)/(DQS1L/CQ1L#,DPCLK1) | bidirectional |
| L1 | IO,_DIFFIO_L8n,_(DQ1L) | bidirectional |
| L3 | IO,_VREFB2N0 | bidirectional |
| N2 | IO,_DIFFIO_L9p,_(DQ1L) | bidirectional |
| N1 | IO,_DIFFIO_L9n,_(DQ1L) | bidirectional |
| K5 | IO,_RUP1,_(DQ1L) | bidirectional |
| L4 | IO,_RDN1,_(DQ1L) | bidirectional |
| R1 | IO,_(DQS3L/CQ3L#)/(DQS3L/CQ3L#) | bidirectional |
| P2 | IO,_DIFFIO_L10p,_(DQ1L) | bidirectional |
| P1 | IO,_DIFFIO_L10n,_(DM1L/BWS#1L) | bidirectional |
| N3 | IO,_DIFFIO_B1p | bidirectional |
| P3 | IO,_DIFFIO_B1n,_(DM3B/BWS#3B)/(DM5B/BWS#5B) | bidirectional |
| R3 | IO,_DIFFIO_B2p,_(DQ3B)/(DQ5B) | bidirectional |
| T3 | IO,_DIFFIO_B2n | bidirectional |
| T2 | IO,_(DQS1B/CQ1B#,DPCLK2)/(DQS1B/CQ1B#,DPCLK2) | bidirectional |
| R4 | IO,_PLL1_CLKOUTp | bidirectional |
| T4 | IO,_PLL1_CLKOUTn | bidirectional |
| N5 | IO,_DIFFIO_B4p,_(DQ3B)/(DQ5B) | bidirectional |
| N6 | IO,_DIFFIO_B4n,_(DQ3B)/(DQ5B) | bidirectional |
| M6 | IO,_(DQ3B)/(DQ5B) | bidirectional |
| P6 | IO,_VREFB3N0 | bidirectional |
| M7 | IO,_DIFFIO_B5p,_(DQS3B/CQ3B#)/(DQS3B/CQ3B#) | bidirectional |
| K8 | IO,_DIFFIO_B5n | bidirectional |
| R5 | IO,_DIFFIO_B6p,_(DQ3B)/(DQ5B) | bidirectional |
| T5 | IO,_DIFFIO_B6n | bidirectional |
| R6 | IO,_DIFFIO_B7p,_(DQ3B)/(DQ5B) | bidirectional |
| T6 | IO,_DIFFIO_B7n | bidirectional |
| L7 | IO,_(DQ3B)/(DQ5B) | bidirectional |
| R7 | IO,_DIFFIO_B8p,_(DQ3B)/(DQ5B) | bidirectional |
| T7 | IO,_DIFFIO_B8n,_(DQS5B/CQ5B#)/(DQS5B/CQ5B#) | bidirectional |
| L8 | IO,_DIFFIO_B9p,_(DQ3B)/(DQ5B) | bidirectional |
| M8 | IO,_DIFFIO_B9n,_(DM5B/BWS#5B)/(DM5B/BWS#5B) | bidirectional |
| N8 | IO,_DIFFIO_B10p,_(DQ5B)/(DQ5B) | bidirectional |
| P8 | IO,_DIFFIO_B10n,_(DQ5B)/(DQ5B) | bidirectional |
| R8 | IO,_DIFFIO_B11p | bidirectional |
| T8 | IO,_DIFFIO_B11n | bidirectional |
| R9 | IO,_DIFFIO_B12p | bidirectional |
| T9 | IO,_DIFFIO_B12n | bidirectional |
| K9 | IO,_DIFFIO_B13p | bidirectional |
| L9 | IO,_DIFFIO_B13n | bidirectional |
| M9 | IO,_DIFFIO_B14p | bidirectional |
| N9 | IO,_DIFFIO_B14n,_(DQ5B)/(DQ5B) | bidirectional |
| R10 | IO,_DIFFIO_B15p,_(DQ5B)/(DQ5B) | bidirectional |
| T10 | IO,_DIFFIO_B15n,_(DQS4B/CQ5B)/(DQS4B/CQ5B) | bidirectional |
| R11 | IO,_DIFFIO_B16p,_(DQ5B)/(DQ5B) | bidirectional |
| T11 | IO,_DIFFIO_B16n | bidirectional |
| R12 | IO,_DIFFIO_B17p,_(DQ5B)/(DQ5B) | bidirectional |
| T12 | IO,_DIFFIO_B17n,_(DQ5B)/(DQ5B) | bidirectional |
| K10 | IO,_DIFFIO_B18p | bidirectional |
| L10 | IO,_DIFFIO_B18n | bidirectional |
| P9 | IO,_(DQS2B/CQ3B)/(DQS2B/CQ3B) | bidirectional |
| P11 | IO,_VREFB4N0 | bidirectional |
| R13 | IO,_DIFFIO_B19p | bidirectional |
| T13 | IO,_DIFFIO_B19n,_(DQ5B)/(DQ5B) | bidirectional |
| M10 | IO,_RUP2 | bidirectional |
| N11 | IO,_RDN2 | bidirectional |
| T14 | IO,_DIFFIO_B20p,_(DQ5B)/(DQ5B) | bidirectional |
| T15 | IO,_DIFFIO_B20n,_(DQS0B/CQ1B,DPCLK3)/(DQS0B/CQ1B,DPCLK3) | bidirectional |
| R14 | IO | bidirectional |
| P14 | IO,_DIFFIO_B21p | bidirectional |
| L11 | IO,_DIFFIO_B21n | bidirectional |
| M11 | IO,_DIFFIO_B22p | bidirectional |
| N12 | IO,_DIFFIO_B22n | bidirectional |
| N13 | IO | bidirectional |
| M12 | IO | bidirectional |
| L12 | IO | bidirectional |
| K12 | IO | bidirectional |
| N14 | IO,_RUP3,_(DM1R/BWS#1R) | bidirectional |
| P15 | IO,_RDN3,_(DQ1R) | bidirectional |
| P16 | IO,_DIFFIO_R11n,_(DQS3R/CQ3R#)/(DQS3R/CQ3R#) | bidirectional |
| R16 | IO,_DIFFIO_R11p,_(DQ1R) | bidirectional |
| K11 | IO | bidirectional |
| N16 | IO,_DIFFIO_R10n,_(DQ1R) | bidirectional |
| N15 | IO,_DIFFIO_R10p,_(DQ1R) | bidirectional |
| L14 | IO,_VREFB5N0 | bidirectional |
| L13 | IO,_(DQ1R) | bidirectional |
| L16 | IO,_DIFFIO_R9n,_(DQ1R) | bidirectional |
| L15 | IO,_DIFFIO_R9p | bidirectional |
| J11 | IO | bidirectional |
| K16 | IO,_DIFFIO_R8n,_(DQ1R) | bidirectional |
| K15 | IO,_DIFFIO_R8p,_(DQS1R/CQ1R#,DPCLK4)/(DQS1R/CQ1R#,DPCLK4) | bidirectional |
| J16 | IO,_DIFFIO_R7n,_(DEV_OE) | bidirectional |
| J15 | IO,_DIFFIO_R7p,_(DEV_CLRn) | bidirectional |
| J14 | IO,_DIFFIO_R6n,_(DQ1R) | bidirectional |
| J12 | IO,_DIFFIO_R6p | bidirectional |
| J13 | IO,_(DQ1R) | bidirectional |
| G16 | IO,_DIFFIO_R4n,_(INIT_DONE) | bidirectional |
| G15 | IO,_DIFFIO_R4p,_(CRC_ERROR) | bidirectional |
| F13 | IO | bidirectional |
| F16 | IO,_DIFFIO_R3n,_(nCEO) | bidirectional |
| F15 | IO,_DIFFIO_R3p,_(CLKUSR) | bidirectional |
| B16 | IO,_(DQS0R/CQ1R,DPCLK5)/(DQS0R/CQ1R,DPCLK5) | bidirectional |
| F14 | IO,_VREFB6N0 | bidirectional |
| D16 | IO,_DIFFIO_R2n | bidirectional |
| D15 | IO,_DIFFIO_R2p | bidirectional |
| G11 | IO | bidirectional |
| C16 | IO,_DIFFIO_R1n,_(DQS2R/CQ3R)/(DQS2R/CQ3R) | bidirectional |
| C15 | IO,_DIFFIO_R1p | bidirectional |
| C14 | IO,_DIFFIO_T21n | bidirectional |
| D14 | IO,_DIFFIO_T21p,_(DQ5T)/(DQ5T) | bidirectional |
| D11 | IO,_DIFFIO_T20n | bidirectional |
| D12 | IO,_DIFFIO_T20p,_(DQS0T/CQ1T,DPCLK6)/(DQS0T/CQ1T,DPCLK6) | bidirectional |
| A13 | IO,_DIFFIO_T19n | bidirectional |
| B13 | IO,_DIFFIO_T19p,_(DQ5T)/(DQ5T) | bidirectional |
| A14 | IO,_PLL2_CLKOUTn | bidirectional |
| B14 | IO,_PLL2_CLKOUTp | bidirectional |
| E11 | IO,_RUP4 | bidirectional |
| E10 | IO,_RDN4 | bidirectional |
| A12 | IO,_DIFFIO_T18n,_(DQ5T)/(DQ5T) | bidirectional |
| B12 | IO,_DIFFIO_T18p,_(DQ5T)/(DQ5T) | bidirectional |
| A11 | IO,_DIFFIO_T17n,_(DQ5T)/(DQ5T) | bidirectional |
| B11 | IO,_DIFFIO_T17p,_(DQ5T)/(DQ5T) | bidirectional |
| C11 | IO,_VREFB7N0 | bidirectional |
| F10 | IO,_DIFFIO_T16n | bidirectional |
| F9 | IO,_DIFFIO_T16p,_(DQS2T/CQ3T)/(DQS2T/CQ3T) | bidirectional |
| F11 | IO,_DIFFIO_T15n | bidirectional |
| A15 | IO,_DIFFIO_T15p | bidirectional |
| A10 | IO,_DIFFIO_T14n,_(DQ5T)/(DQ5T) | bidirectional |
| B10 | IO,_DIFFIO_T14p,_(DQ5T)/(DQ5T) | bidirectional |
| C9 | IO,_DIFFIO_T13n,_(DQ5T)/(DQ5T) | bidirectional |
| D9 | IO,_DIFFIO_T13p,_(DM5T/BWS#5T)/(DM5T/BWS#5T) | bidirectional |
| E9 | IO,_(DQS4T/CQ5T)/(DQS4T/CQ5T) | bidirectional |
| A9 | IO,_DIFFIO_T12n | bidirectional |
| B9 | IO,_DIFFIO_T12p | bidirectional |
| A8 | IO,_DIFFIO_T11n | bidirectional |
| B8 | IO,_DIFFIO_T11p | bidirectional |
| C8 | IO,_(DQS5T/CQ5T#)/(DQS5T/CQ5T#) | bidirectional |
| D8 | IO,_(DQ3T)/(DQ5T) | bidirectional |
| E8 | IO,_DIFFIO_T10n,_(DATA2),_(DQ3T)/(DQ5T) | bidirectional |
| F8 | IO,_DIFFIO_T10p,_(DATA3) | bidirectional |
| A7 | IO,_DIFFIO_T9n,_(DQ3T)/(DQ5T) | bidirectional |
| B7 | IO,_DIFFIO_T9p,_(DATA4),_(DQ3T)/(DQ5T) | bidirectional |
| F6 | IO,_DIFFIO_T8n | bidirectional |
| F7 | IO,_DIFFIO_T8p | bidirectional |
| C6 | IO,_VREFB8N0 | bidirectional |
| A6 | IO,_DIFFIO_T7n,_(DQS3T/CQ3T#)/(DQS3T/CQ3T#) | bidirectional |
| B6 | IO,_DIFFIO_T7p,_(DQ3T)/(DQ5T) | bidirectional |
| E7 | IO,_(DATA5),_(DQ3T)/(DQ5T) | bidirectional |
| E6 | IO,_(DATA6),_(DQ3T)/(DQ5T) | bidirectional |
| A5 | IO,_DIFFIO_T6n,_(DATA7),_(DQ3T)/(DQ5T) | bidirectional |
| A2 | IO,_DIFFIO_T5n | bidirectional |
| B5 | IO,_DIFFIO_T5p,_(DQ3T)/(DQ5T) | bidirectional |
| A4 | IO,_DIFFIO_T4n,_(DM3T/BWS#3T)/(DM5T/BWS#5T) | bidirectional |
| B4 | IO,_DIFFIO_T4p | bidirectional |
| D5 | IO,_DIFFIO_T3n | bidirectional |
| D6 | IO,_DIFFIO_T3p | bidirectional |
| A3 | IO,_DIFFIO_T2n | bidirectional |
| B3 | IO,_DIFFIO_T2p,_(DQS1T/CQ1T#,DPCLK7)/(DQS1T/CQ1T#,DPCLK7) | bidirectional |
| C3 | IO,_DIFFIO_T1n | bidirectional |
| D3 | IO,_DIFFIO_T1p | bidirectional |
| E1 | CLK1,_DIFFCLK_0n | input |
| M2 | CLK2,_DIFFCLK_1p | input |
| M1 | CLK3,_DIFFCLK_1n | input |
| E15 | CLK4,_DIFFCLK_2p | input |
| E16 | CLK5,_DIFFCLK_2n | input |
| M15 | CLK6,_DIFFCLK_3p | input |
| M16 | CLK7,_DIFFCLK_3n | input |
| H4 | TDI | input |
| J4 | TDO | output |
| H3 | TCK | input |
| J5 | TMS | input |
| H13 | MSEL0 | input |
| H12 | MSEL1 | input |
| G12 | MSEL2 | input |
| J3 | nCE | input |
| H1 | DCLK | bidirectional |
| H14 | CONF_DONE | bidirectional |
| H5 | nCONFIG | input |
| F4 | nSTATUS | bidirectional |
| E3 | VCCIO1 | power_in |
| G3 | VCCIO1 | power_in |
| K3 | VCCIO2 | power_in |
| M3 | VCCIO2 | power_in |
| P4 | VCCIO3 | power_in |
| P7 | VCCIO3 | power_in |
| T1 | VCCIO3 | power_in |
| P10 | VCCIO4 | power_in |
| P13 | VCCIO4 | power_in |
| T16 | VCCIO4 | power_in |
| K14 | VCCIO5 | power_in |
| M14 | VCCIO5 | power_in |
| E14 | VCCIO6 | power_in |
| G14 | VCCIO6 | power_in |
| A16 | VCCIO7 | power_in |
| C10 | VCCIO7 | power_in |
| C13 | VCCIO7 | power_in |
| A1 | VCCIO8 | power_in |
| C4 | VCCIO8 | power_in |
| C7 | VCCIO8 | power_in |
| G6 | VCCINT | power_in |
| G7 | VCCINT | power_in |
| G8 | VCCINT | power_in |
| G9 | VCCINT | power_in |
| G10 | VCCINT | power_in |
| H6 | VCCINT | power_in |
| H11 | VCCINT | power_in |
| K7 | VCCINT | power_in |
| H7 | GND | power_in |
| H8 | GND | power_in |
| H9 | GND | power_in |
| H10 | GND | power_in |
| J7 | GND | power_in |
| J8 | GND | power_in |
| J9 | GND | power_in |
| J10 | GND | power_in |
| B2 | GND | power_in |
| B15 | GND | power_in |
| C5 | GND | power_in |
| C12 | GND | power_in |
| D7 | GND | power_in |
| D10 | GND | power_in |
| E4 | GND | power_in |
| E13 | GND | power_in |
| G4 | GND | power_in |
| G13 | GND | power_in |
| K4 | GND | power_in |
| K13 | GND | power_in |
| M4 | GND | power_in |
| M13 | GND | power_in |
| N7 | GND | power_in |
| N10 | GND | power_in |
| P5 | GND | power_in |
| P12 | GND | power_in |
| R2 | GND | power_in |
| R15 | GND | power_in |
| E2 | GND | power_in |
| H16 | GND | power_in |
| H15 | GND | power_in |
| L5 | VCCA1 | power_in |
| N4 | VCCD_PLL1 | power_in |
| F12 | VCCA2 | power_in |
| D13 | VCCD_PLL2 | power_in |
| M5 | GNDA1 | power_in |
| E12 | GNDA2 | power_in |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.
