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ICS557G-03LF
2 Output PCI-Express Gen 1 Clock Source
Schematic Symbol
Pin Configuration (16 pins)
| Pin | Name | Type |
|---|---|---|
| 3 | SS0 | input |
| 8 | SS1 | input |
| 1 | S0 | input |
| 2 | S1 | input |
| 6 | OE | input |
| 4 | X1/ICLK | input |
| 5 | X2 | output |
| 16 | VDDXD | power_in |
| 7 | GNDXD | power_in |
| 15 | CLK0 | output |
| 14 | ~{CLK0} | output |
| 11 | CLK1 | output |
| 10 | ~{CLK1} | output |
| 9 | IREF | output |
| 12 | VDDODA | power_in |
| 13 | GNDODA | power_in |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.