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Si53340
Low-Jitter LVDS Fanout Clock Buffers, 10-Output, Any-Input, Any-Frequency up to 1250MHz
Schematic Symbol
Pin Configuration (16 pins)
| Pin | Name | Type |
|---|---|---|
| 6 | CLK0 | input |
| 7 | ~{CLK0} | input |
| 3 | CLK1 | input |
| 4 | ~{CLK1} | input |
| 2 | CLK_SEL | input |
| 5 | VDD | power_in |
| 1 | GND | power_in |
| 17 | GND | power_in |
| 9 | Q0 | output |
| 10 | ~{Q0} | output |
| 11 | Q1 | output |
| 12 | ~{Q1} | output |
| 13 | Q2 | output |
| 14 | ~{Q2} | output |
| 15 | Q3 | output |
| 16 | ~{Q3} | output |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.