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FU540-C000

64-bit RISC‑V SoC, BGA-484

Schematic Symbol

FU540-C000CL_0_B2C_D_2CL_0_B2C_D_8CL_0_B2C_D_23CL_0_B2C_D_29CL_0_B2C_CLKCL_0_B2C_D_1CL_0_B2C_D_13CL_0_B2C_D_22CL_0_B2C_D_26CL_0_B2C_RSTCL_0_B2C_D_21CL_0_B2C_D_24CL_0_B2C_D_17CL_0_B2C_D_19CL_0_B2C_D_20CL_0_B2C_D_14CL_0_B2C_D_18CL_0_B2C_D_12CL_0_B2C_D_16CL_0_B2C_D_9CL_0_B2C_D_15CL_0_B2C_D_25CL_0_B2C_D_4CL_0_B2C_D_3CL_0_B2C_D_5CL_0_B2C_D_11CL_0_B2C_D_28CL_0_B2C_SENDCL_0_B2C_D_0CL_0_B2C_D_7CL_0_B2C_D_6CL_0_B2C_D_10CL_0_B2C_D_27CL_0_B2C_D_31CL_0_B2C_D_30DDR_RSVD1DDR_RSVD0DDR_CAL_0DDR_RSVD2DDR_RSVD3DDR_MEM_ERROR_NGEMGXL_0_RXD_5GEMGXL_0_RXD_2GEMGXL_0_RX_DVGEMGXL_0_RXD_0GEMGXL_0_COLGEMGXL_0_RXD_1GEMGXL_0_RX_ERGEMGXL_0_TX_CLKGEMGXL_0_RXD_6GEMGXL_0_CRSGEMGXL_0_RXD_7GEMGXL_0_RXD_4GEMGXL_0_RXD_3GEMGXL_0_GTX_CLKGEMGXL_0_RX_CLKUART_1_RXDUART_0_RXDHFXOSCINPRCI_RSVD0PRCI_PORESET_NMSEL_MSEL_0MSEL_MSEL_2HFXOSCOUTPRCI_RTCXALTCLKINPRCI_RSVD6MSEL_MSEL_3PRCI_RSVD15PRCI_HFXSELPRCI_RSVD4PRCI_ERESET_NMSEL_MSEL_1JTAG_TDIPRCI_RSVD1PRCI_RSVD11PRCI_RTCXSELPRCI_RSVD3PRCI_RSVD10JTAG_TCKPRCI_RSVD2PRCI_RSVD12PRCI_RSVD5PRCI_RSVD9PRCI_RSVD14PRCI_RSVD13PRCI_HFXCLKINJTAG_TMSPRCI_RSVD7PRCI_RSVD8VSSVSSVSSVSSVSSVSSVSSVSSVDDVSSVSSVSSVSSVSSVSSVSSVDDVDDVDDVSSVSSVDDVSSVDDVSSVSSVSSVSSDDR_VDDQVSSVDDVSSVDDVSSOTP_VDDVDDVSSDDR_VDDQVSSVDDVSSVDDGIVSSVDDVDDVSSVDDVSSVSSDDR_VDDQVSSVDDVSSGIVDDGEMGXLPLL_AVSSDDRPLL_AVSSCOREPLL_AVSSVDDVSSVSSDDR_VDDQVSSVDDVSSVDDVSSGEMGXLPLL_AVDDDDRPLL_AVDDCOREPLL_AVDDIVSSIVDDVDDVSSDDR_VDDQVSSDDR_VDDPLLVSSVDDVSSVDDVSSIVSSIVDDDDR_VDDQVSSVDDDDR_VDDPLLVDDVSSVDDVSSVDDIVSSIVDDVSSDDR_VDDQVSSVDDVSSVDDVSSVDDVSSIVSSIVDDVSSVDDDDR_VDDQVSSVDDVSSVDDVSSVDDVSSVDDVSSVDDVDDVSSVSSDDR_VDDQVSSVDDVSSVDDVSSVDDVSSVDDVSSDDR_VDDQVSSVDDVSSVDDVSSVDDVSSVDDVSSVDDVSSVSSDDR_VDDQCKVSSVDDVSSVDDVSSVDDVSSVDDVSSVSSVDDVSSVDDVSSVDDVSSVDDVSSVDDVSSVDDVSSCL_0_C2B_D_28CL_0_C2B_D_24CL_0_C2B_D_26CL_0_C2B_D_31CL_0_C2B_D_30CL_0_C2B_D_27CL_0_C2B_D_20CL_0_C2B_D_18CL_0_C2B_D_29CL_0_C2B_D_15CL_0_C2B_D_19CL_0_C2B_D_23CL_0_C2B_D_12CL_0_C2B_D_25CL_0_C2B_D_22CL_0_C2B_SENDCL_0_C2B_D_2CL_0_C2B_D_6CL_0_C2B_D_21CL_0_C2B_D_16CL_0_C2B_D_14CL_0_C2B_CLKCL_0_C2B_D_4CL_0_C2B_D_1CL_0_C2B_D_3CL_0_C2B_D_8CL_0_C2B_D_17CL_0_C2B_D_0CL_0_C2B_RSTCL_0_C2B_D_13CL_0_C2B_D_10CL_0_C2B_D_5CL_0_C2B_D_11CL_0_C2B_D_7CL_0_C2B_D_9DDR_MEM_D[18]DDR_MEM_D[19]DDR_MEM_DQS_P[2]DDR_MEM_DQS_M[2]DDR_MEM_D[41]DDR_MEM_D[45]DDR_MEM_D[47]DDR_MEM_ODT[0]DDR_MEM_CKE[1]DDR_MEM_DQS_M[6]DDR_MEM_DQS_P[7]DDR_MEM_D[62]DDR_MEM_D[61]DDR_MEM_D[63]DDR_MEM_D[58]DDR_MEM_D[56]DDR_MEM_D[44]DDR_MEM_D[46]DDR_MEM_ODT[1]DDR_MEM_CKE[0]DDR_MEM_D[57]DDR_MEM_D[59]DDR_MEM_D[60]DDR_MEM_DM[7]DDR_MEM_D[1]DDR_MEM_D[17]DDR_MEM_D[22]DDR_MEM_D[16]DDR_MEM_D[20]DDR_MEM_D[23]DDR_MEM_D[4]DDR_MEM_D[29]DDR_MEM_D[27]DDR_MEM_D[24]DDR_MEM_D[21]DDR_MEM_DM[2]DDR_MEM_D[31]DDR_MEM_D[0]DDR_MEM_D[30]DDR_MEM_D[25]DDR_MEM_DM[3]DDR_MEM_D[26]DDR_MEM_DQS_M[3]DDR_MEM_D[6]DDR_MEM_D[3]DDR_MEM_DM[0]DDR_MEM_D[28]DDR_MEM_DQS_P[3]DDR_MEM_D[9]DDR_MEM_DQS_P[0]DDR_MEM_DQS_M[0]DDR_MEM_D[2]DDR_MEM_D[10]DDR_MEM_D[11]DDR_MEM_D[7]DDR_MEM_D[5]DDR_MEM_DM[1]DDR_MEM_D[12]DDR_MEM_DQS_P[1]DDR_MEM_DQS_M[1]DDR_MEM_D[8]DDR_MEM_ECC_D[0]DDR_MEM_D[14]DDR_MEM_D[13]DDR_MEM_D[15]DDR_MEM_ECC_DMDDR_MEM_ECC_D[1]DDR_MEM_ECC_DQS_PDDR_MEM_ECC_DQS_MDDR_MEM_ECC_D[2]DDR_MEM_CLKDDR_MEM_ECC_D[4]DDR_MEM_ECC_D[3]DDR_MEM_ECC_D[7]DDR_MEM_ECC_D[5]DDR_MEM_CLK_NDDR_MEM_ECC_D[6]DDR_MEM_RAS_NDDR_MEM_CAS_NDDR_MEM_BANK[0]DDR_MEM_BANK[2]DDR_MEM_WE_NDDR_MEM_BANK[1]DDR_MEM_ADDR[0]DDR_MEM_ADDR[2]DDR_MEM_ADDR[5]DDR_MEM_ADDR[3]DDR_MEM_ADDR[6]DDR_MEM_ADDR[12]DDR_MEM_ADDR[1]DDR_MEM_ADDR[7]DDR_MEM_ADDR[8]DDR_MEM_ADDR[11]DDR_MEM_D[32]DDR_MEM_ADDR[4]DDR_MEM_ADDR[13]DDR_MEM_ADDR[9]DDR_MEM_D[34]DDR_MEM_DM[4]DDR_MEM_ADDR[10]DDR_MEM_PARITY_INDDR_MEM_ADDR[14]DDR_MEM_DQS_M[4]DDR_MEM_D[39]DDR_MEM_D[35]DDR_MEM_ADDR[15]DDR_MEM_DQS_P[4]DDR_MEM_D[40]DDR_MEM_D[33]DDR_MEM_D[38]DDR_MEM_D[37]DDR_MEM_DQS_M[5]DDR_MEM_DM[5]DDR_MEM_CS_N[1]DDR_MEM_D[51]DDR_MEM_D[55]DDR_MEM_DM[6]DDR_MEM_D[49]DDR_MEM_D[54]DDR_MEM_D[36]DDR_MEM_D[43]DDR_MEM_D[42]DDR_MEM_DQS_P[5]DDR_MEM_RESET_NDDR_MEM_CS_N[0]DDR_MEM_DQS_P[6]DDR_MEM_DQS_M[7]DDR_MEM_D[53]DDR_MEM_D[52]DDR_MEM_D[50]DDR_MEM_D[48]GEMGXL_0_TX_ENGEMGXL_0_TXD_6GEMGXL_0_TXD_0GEMGXL_0_MDCGEMGXL_0_TXD_4GEMGXL_0_TXD_1GEMGXL_0_MDIOGEMGXL_0_TXD_7GEMGXL_0_TXD_5GEMGXL_0_TXD_2GEMGXL_0_TX_ERGEMGXL_0_TXD_3GPIO_0_P_9UART_1_TXDQSPI_2_DQ_0QSPI_2_CS_0QSPI_2_DQ_1QSPI_2_DQ_2GPIO_0_P_11GPIO_0_P_12GPIO_0_P_14GPIO_0_P_7GPIO_0_P_2GPIO_0_P_1GPIO_0_P_8GPIO_0_P_5GPIO_0_P_3PWM_1_P_0GPIO_0_P_4GPIO_0_P_13GPIO_0_P_6GPIO_0_P_0GPIO_0_P_10PWM_1_P_3PWM_0_P_2PWM_0_P_1QSPI_1_DQ_2GPIO_0_P_15PWM_1_P_2PWM_0_P_0PWM_0_P_3QSPI_1_CS_1QSPI_1_DQ_0PWM_1_P_1QSPI_1_SCKQSPI_1_CS_2QSPI_0_DQ_3QSPI_0_DQ_0QSPI_0_DQ_1QSPI_1_DQ_3QSPI_1_DQ_1QSPI_0_CS_0QSPI_1_CS_3QSPI_0_DQ_2QSPI_1_CS_0QSPI_0_SCKI2C_0_SDAQSPI_2_SCKUART_0_TXDI2C_0_SCLQSPI_2_DQ_3JTAG_TDO

Pin Configuration (484 pins)

PinNameType
AA18CL_0_B2C_D_2input
AA19CL_0_B2C_D_8input
AA20CL_0_B2C_D_23input
AA21CL_0_B2C_D_29input
AA22CL_0_B2C_CLKinput
AB18CL_0_B2C_D_1input
AB19CL_0_B2C_D_13input
AB20CL_0_B2C_D_22input
AB21CL_0_B2C_D_26input
K19CL_0_C2B_D_28output
K20CL_0_C2B_D_24output
K22CL_0_C2B_D_26output
L17CL_0_C2B_D_31output
L18CL_0_C2B_D_30output
L19CL_0_C2B_D_27output
L20CL_0_C2B_D_20output
L21CL_0_C2B_D_18output
L22CL_0_C2B_D_29output
M17CL_0_C2B_D_15output
M18CL_0_C2B_D_19output
M19CL_0_C2B_D_23output
M20CL_0_C2B_D_12output
M21CL_0_C2B_D_25output
M22CL_0_C2B_D_22output
N17CL_0_C2B_SENDoutput
N18CL_0_C2B_D_2output
N19CL_0_C2B_D_6output
N20CL_0_C2B_D_21output
N21CL_0_C2B_D_16output
N22CL_0_C2B_D_14output
P17CL_0_B2C_RSTinput
P18CL_0_B2C_D_21input
P19CL_0_C2B_CLKoutput
P20CL_0_C2B_D_4output
R17CL_0_B2C_D_24input
R18CL_0_B2C_D_17input
R19CL_0_C2B_D_1output
R20CL_0_C2B_D_3output
R21CL_0_C2B_D_8output
R22CL_0_C2B_D_17output
T18CL_0_B2C_D_19input
T19CL_0_C2B_D_0output
T20CL_0_C2B_RSToutput
T21CL_0_C2B_D_13output
T22CL_0_C2B_D_10output
U17CL_0_B2C_D_20input
U18CL_0_B2C_D_14input
U19CL_0_B2C_D_18input
U20CL_0_C2B_D_5output
U21CL_0_C2B_D_11output
U22CL_0_C2B_D_7output
V16CL_0_B2C_D_12input
V17CL_0_B2C_D_16input
V18CL_0_B2C_D_9input
V19CL_0_B2C_D_15input
V20CL_0_B2C_D_25input
W16CL_0_B2C_D_4input
W17CL_0_B2C_D_3input
W18CL_0_B2C_D_5input
W19CL_0_B2C_D_11input
W20CL_0_B2C_D_28input
W21CL_0_B2C_SENDinput
W22CL_0_C2B_D_9output
Y16CL_0_B2C_D_0input
Y17CL_0_B2C_D_7input
Y18CL_0_B2C_D_6input
Y19CL_0_B2C_D_10input
Y20CL_0_B2C_D_27input
Y21CL_0_B2C_D_31input
Y22CL_0_B2C_D_30input
A4DDR_MEM_D[18]bidirectional
A5DDR_MEM_D[19]bidirectional
A6DDR_MEM_DQS_P[2]bidirectional
A7DDR_MEM_DQS_M[2]bidirectional
AA1DDR_MEM_D[41]bidirectional
AA3DDR_MEM_D[45]bidirectional
AA4DDR_MEM_D[47]bidirectional
AA5DDR_MEM_ODT[0]output
AA6DDR_MEM_CKE[1]output
AA7DDR_MEM_DQS_M[6]bidirectional
AA8DDR_MEM_DQS_P[7]bidirectional
AA9DDR_MEM_D[62]bidirectional
AA10DDR_MEM_D[61]bidirectional
AA11DDR_MEM_D[63]bidirectional
AA12DDR_MEM_D[58]bidirectional
AA13DDR_MEM_D[56]bidirectional
AB2DDR_MEM_D[44]bidirectional
AB3DDR_MEM_D[46]bidirectional
AB5DDR_MEM_ODT[1]output
AB6DDR_MEM_CKE[0]output
AB8DDR_MEM_D[57]bidirectional
AB9DDR_MEM_D[59]bidirectional
AB11DDR_MEM_D[60]bidirectional
AB12DDR_MEM_DM[7]bidirectional
B1DDR_MEM_D[1]bidirectional
B2DDR_MEM_D[17]bidirectional
B3DDR_MEM_D[22]bidirectional
B4DDR_MEM_D[16]bidirectional
B5DDR_MEM_D[20]bidirectional
B6DDR_MEM_D[23]bidirectional
C1DDR_MEM_D[4]bidirectional
C2DDR_MEM_D[29]bidirectional
C3DDR_MEM_D[27]bidirectional
C4DDR_MEM_D[24]bidirectional
C5DDR_MEM_D[21]bidirectional
C6DDR_MEM_DM[2]bidirectional
C7DDR_MEM_D[31]bidirectional
D2DDR_MEM_D[0]bidirectional
D3DDR_MEM_D[30]bidirectional
D4DDR_MEM_D[25]bidirectional
D5DDR_MEM_DM[3]bidirectional
D6DDR_MEM_D[26]bidirectional
D7DDR_MEM_DQS_M[3]bidirectional
D8DDR_RSVD1passive
E1DDR_MEM_D[6]bidirectional
E2DDR_MEM_D[3]bidirectional
E5DDR_MEM_DM[0]bidirectional
E6DDR_MEM_D[28]bidirectional
E7DDR_MEM_DQS_P[3]bidirectional
E8DDR_RSVD0passive
F1DDR_MEM_D[9]bidirectional
F2DDR_MEM_DQS_P[0]bidirectional
F3DDR_MEM_DQS_M[0]bidirectional
F4DDR_MEM_D[2]bidirectional
F5DDR_MEM_D[10]bidirectional
F6DDR_CAL_0passive
F8DDR_RSVD2passive
F9DDR_RSVD3passive
G1DDR_MEM_D[11]bidirectional
G3DDR_MEM_D[7]bidirectional
G4DDR_MEM_D[5]bidirectional
G5DDR_MEM_DM[1]bidirectional
H1DDR_MEM_D[12]bidirectional
H2DDR_MEM_DQS_P[1]bidirectional
H3DDR_MEM_DQS_M[1]bidirectional
H4DDR_MEM_D[8]bidirectional
H5DDR_MEM_ECC_D[0]bidirectional
J2DDR_MEM_D[14]bidirectional
J3DDR_MEM_D[13]bidirectional
J4DDR_MEM_D[15]bidirectional
J5DDR_MEM_ECC_DMbidirectional
K1DDR_MEM_ECC_D[1]bidirectional
K2DDR_MEM_ECC_DQS_Pbidirectional
K3DDR_MEM_ECC_DQS_Mbidirectional
K4DDR_MEM_ECC_D[2]bidirectional
K5DDR_MEM_CLKoutput
L1DDR_MEM_ECC_D[4]bidirectional
L2DDR_MEM_ECC_D[3]bidirectional
L3DDR_MEM_ECC_D[7]bidirectional
L4DDR_MEM_ECC_D[5]bidirectional
L5DDR_MEM_CLK_Noutput
M1DDR_MEM_ECC_D[6]bidirectional
M2DDR_MEM_RAS_Noutput
M3DDR_MEM_CAS_Noutput
M4DDR_MEM_BANK[0]output
M5DDR_MEM_BANK[2]output
N1DDR_MEM_WE_Noutput
N2DDR_MEM_BANK[1]output
N3DDR_MEM_ADDR[0]output
N4DDR_MEM_ADDR[2]output
N5DDR_MEM_ADDR[5]output
P3DDR_MEM_ADDR[3]output
P4DDR_MEM_ADDR[6]output
P5DDR_MEM_ADDR[12]output
R1DDR_MEM_ADDR[1]output
R2DDR_MEM_ADDR[7]output
R3DDR_MEM_ADDR[8]output
R4DDR_MEM_ADDR[11]output
R5DDR_MEM_D[32]bidirectional
T1DDR_MEM_ADDR[4]output
T2DDR_MEM_ADDR[13]output
T3DDR_MEM_ADDR[9]output
T4DDR_MEM_D[34]bidirectional
T5DDR_MEM_DM[4]bidirectional
U1DDR_MEM_ADDR[10]output
U2DDR_MEM_PARITY_INoutput
U3DDR_MEM_ADDR[14]output
U4DDR_MEM_DQS_M[4]bidirectional
U5DDR_MEM_D[39]bidirectional
V2DDR_MEM_D[35]bidirectional
V3DDR_MEM_ADDR[15]output
V4DDR_MEM_DQS_P[4]bidirectional
V5DDR_MEM_D[40]bidirectional
W1DDR_MEM_D[33]bidirectional
W2DDR_MEM_D[38]bidirectional
W3DDR_MEM_D[37]bidirectional
W4DDR_MEM_DQS_M[5]bidirectional
W5DDR_MEM_DM[5]bidirectional
W6DDR_MEM_ERROR_Ninput
W7DDR_MEM_CS_N[1]output
W8DDR_MEM_D[51]bidirectional
W9DDR_MEM_D[55]bidirectional
W10DDR_MEM_DM[6]bidirectional
W11DDR_MEM_D[49]bidirectional
W12DDR_MEM_D[54]bidirectional
Y1DDR_MEM_D[36]bidirectional
Y2DDR_MEM_D[43]bidirectional
Y3DDR_MEM_D[42]bidirectional
Y4DDR_MEM_DQS_P[5]bidirectional
Y5DDR_MEM_RESET_Noutput
Y6DDR_MEM_CS_N[0]output
Y7DDR_MEM_DQS_P[6]bidirectional
Y8DDR_MEM_DQS_M[7]bidirectional
Y9DDR_MEM_D[53]bidirectional
Y10DDR_MEM_D[52]bidirectional
Y11DDR_MEM_D[50]bidirectional
Y12DDR_MEM_D[48]bidirectional
A8GEMGXL_0_RXD_5input
A10GEMGXL_0_RXD_2input
A11GEMGXL_0_RX_DVinput
A12GEMGXL_0_RXD_0input
A13GEMGXL_0_COLinput
B7GEMGXL_0_TX_ENoutput
B8GEMGXL_0_TXD_6output
B10GEMGXL_0_RXD_1input
B11GEMGXL_0_RX_ERinput
B12GEMGXL_0_TXD_0output
B13GEMGXL_0_MDCoutput
C8GEMGXL_0_TX_CLKinput
C9GEMGXL_0_RXD_6input
C10GEMGXL_0_TXD_4output
C11GEMGXL_0_TXD_1output
C12GEMGXL_0_MDIObidirectional
C13GEMGXL_0_CRSinput
D9GEMGXL_0_TXD_7output
D10GEMGXL_0_TXD_5output
D11GEMGXL_0_TXD_2output
E9GEMGXL_0_RXD_7input
E10GEMGXL_0_RXD_4input
E11GEMGXL_0_RXD_3input
E12GEMGXL_0_GTX_CLKinput
F10GEMGXL_0_TX_ERoutput
F11GEMGXL_0_TXD_3output
F12GEMGXL_0_RX_CLKinput
A21GPIO_0_P_9bidirectional
AA14UART_1_RXDinput
AA15UART_1_TXDoutput
AA16QSPI_2_DQ_0bidirectional
AB14QSPI_2_CS_0output
AB15QSPI_2_DQ_1bidirectional
AB16QSPI_2_DQ_2bidirectional
B20GPIO_0_P_11bidirectional
B21GPIO_0_P_12bidirectional
B22GPIO_0_P_14bidirectional
C20GPIO_0_P_7bidirectional
C21GPIO_0_P_2bidirectional
C22GPIO_0_P_1bidirectional
D19GPIO_0_P_8bidirectional
D20GPIO_0_P_5bidirectional
D21GPIO_0_P_3bidirectional
D22PWM_1_P_0bidirectional
E18GPIO_0_P_4bidirectional
E19GPIO_0_P_13bidirectional
E20GPIO_0_P_6bidirectional
F17GPIO_0_P_0bidirectional
F18GPIO_0_P_10bidirectional
F19PWM_1_P_3bidirectional
F20PWM_0_P_2bidirectional
F21PWM_0_P_1bidirectional
F22QSPI_1_DQ_2bidirectional
G17GPIO_0_P_15bidirectional
G18PWM_1_P_2bidirectional
G19PWM_0_P_0bidirectional
G20PWM_0_P_3bidirectional
G21QSPI_1_CS_1output
G22QSPI_1_DQ_0bidirectional
H17PWM_1_P_1bidirectional
H18QSPI_1_SCKoutput
H19QSPI_1_CS_2output
H20QSPI_0_DQ_3bidirectional
H21QSPI_0_DQ_0bidirectional
H22QSPI_0_DQ_1bidirectional
J17QSPI_1_DQ_3bidirectional
J18QSPI_1_DQ_1bidirectional
J19QSPI_0_CS_0output
J20QSPI_1_CS_3output
J21QSPI_0_DQ_2bidirectional
K17QSPI_1_CS_0output
K18QSPI_0_SCKoutput
W13I2C_0_SDAbidirectional
W14UART_0_RXDinput
W15QSPI_2_SCKoutput
Y13UART_0_TXDoutput
Y14I2C_0_SCLbidirectional
Y15QSPI_2_DQ_3bidirectional
A15HFXOSCINpassive
A16PRCI_RSVD0passive
A17PRCI_PORESET_Ninput
A19MSEL_MSEL_0input
A20MSEL_MSEL_2input
B15HFXOSCOUTpassive
B16PRCI_RTCXALTCLKINpassive
B17PRCI_RSVD6passive
B19MSEL_MSEL_3input
C14PRCI_RSVD15passive
C15PRCI_HFXSELinput
C16PRCI_RSVD4passive
C17PRCI_ERESET_Ninput
C18MSEL_MSEL_1input
C19JTAG_TDIinput
D13PRCI_RSVD1passive
D14PRCI_RSVD11passive
D15PRCI_RTCXSELinput
D16PRCI_RSVD3passive
D17PRCI_RSVD10passive
D18JTAG_TCKinput
E13PRCI_RSVD2passive
E14PRCI_RSVD12passive
E15PRCI_RSVD5passive
E16PRCI_RSVD9passive
E17JTAG_TDOoutput
F13PRCI_RSVD14passive
F14PRCI_RSVD13passive
F15PRCI_HFXCLKINinput
F16JTAG_TMSinput
G13PRCI_RSVD7passive
H13PRCI_RSVD8passive
A1VSSpower_in
A2VSSpassive
A3VSSpassive
A9VSSpassive
A14VSSpassive
A18VSSpassive
A22VSSpassive
AA2VSSpassive
AA17VDDpower_in
AB1VSSpassive
AB4VSSpassive
AB7VSSpassive
AB10VSSpassive
AB13VSSpassive
AB17VSSpassive
AB22VSSpassive
B9VDDpassive
B14VDDpassive
B18VDDpassive
D1VSSpassive
D12VSSpassive
E3VDDpassive
E4VSSpassive
E21VDDpassive
E22VSSpassive
F7VSSpassive
G2VSSpassive
G6VSSpassive
G7DDR_VDDQpower_in
G8VSSpassive
G9VDDpassive
G10VSSpassive
G11VDDpassive
G12VSSpassive
G14OTP_VDDpower_in
G15VDDpassive
G16VSSpassive
H6DDR_VDDQpassive
H7VSSpassive
H8VDDpassive
H9VSSpassive
H10VDDpassive
H11GIVSSpower_in
H12VDDpassive
H14VDDpassive
H15VSSpassive
H16VDDpassive
J1VSSpassive
J6VSSpassive
J7DDR_VDDQpassive
J8VSSpassive
J9VDDpassive
J10VSSpassive
J11GIVDDpower_in
J12GEMGXLPLL_AVSSpower_in
J13DDRPLL_AVSSpower_in
J14COREPLL_AVSSpower_in
J15VDDpassive
J16VSSpassive
J22VSSpassive
K6DDR_VDDQpassive
K7VSSpassive
K8VDDpassive
K9VSSpassive
K10VDDpassive
K11VSSpassive
K12GEMGXLPLL_AVDDpower_in
K13DDRPLL_AVDDpower_in
K14COREPLL_AVDDpower_in
K15IVSSpower_in
K16IVDDpower_in
K21VDDpassive
L6VSSpassive
L7DDR_VDDQpassive
L8VSSpassive
L9DDR_VDDPLLpassive
L10VSSpassive
L11VDDpassive
L12VSSpassive
L13VDDpassive
L14VSSpassive
L15IVSSpassive
L16IVDDpassive
M6DDR_VDDQpassive
M7VSSpassive
M8VDDpassive
M9DDR_VDDPLLpower_in
M10VDDpassive
M11VSSpassive
M12VDDpassive
M13VSSpassive
M14VDDpassive
M15IVSSpassive
M16IVDDpassive
N6VSSpassive
N7DDR_VDDQpassive
N8VSSpassive
N9VDDpassive
N10VSSpassive
N11VDDpassive
N12VSSpassive
N13VDDpassive
N14VSSpassive
N15IVSSpassive
N16IVDDpassive
P1VSSpassive
P2VDDpassive
P6DDR_VDDQpassive
P7VSSpassive
P8VDDpassive
P9VSSpassive
P10VDDpassive
P11VSSpassive
P12VDDpassive
P13VSSpassive
P14VDDpassive
P15VSSpassive
P16VDDpassive
P21VDDpassive
P22VSSpassive
R6VSSpassive
R7DDR_VDDQpassive
R8VSSpassive
R9VDDpassive
R10VSSpassive
R11VDDpassive
R12VSSpassive
R13VDDpassive
R14VSSpassive
R15VDDpassive
R16VSSpassive
T6DDR_VDDQpassive
T7VSSpassive
T8VDDpassive
T9VSSpassive
T10VDDpassive
T11VSSpassive
T12VDDpassive
T13VSSpassive
T14VDDpassive
T15VSSpassive
T16VDDpassive
T17VSSpassive
U6VSSpassive
U7DDR_VDDQCKpower_in
U8VSSpassive
U9VDDpassive
U10VSSpassive
U11VDDpassive
U12VSSpassive
U13VDDpassive
U14VSSpassive
U15VDDpassive
U16VSSpassive
V1VSSpassive
V6VDDpassive
V7VSSpassive
V8VDDpassive
V9VSSpassive
V10VDDpassive
V11VSSpassive
V12VDDpassive
V13VSSpassive
V14VDDpassive
V15VSSpassive
V21VDDpassive
V22VSSpassive

Footprint

Confirmed

Package_BGA/BGA-484_23.0x23.0mm_Layout22x22_P1.0mm

Pad Layout
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
AA9
AA10
AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB9
AB10
AB11
AB12
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
E16
E17
E18
E19
E20
E21
E22
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F17
F18
F19
F20
F21
F22
G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
G12
G13
G14
G15
G16
G17
G18
G19
G20
G21
G22
H1
H2
H3
H4
H5
H6
H7
H8
H9
H10
H11
H12
H13
H14
H15
H16
H17
H18
H19
H20
H21
H22
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
J17
J18
J19
J20
J21
J22
K1
K2
K3
K4
K5
K6
K7
K8
K9
K10
K11
K12
K13
K14
K15
K16
K17
K18
K19
K20
K21
K22
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
M12
M13
M14
M15
M16
M17
M18
M19
M20
M21
M22
N1
N2
N3
N4
N5
N6
N7
N8
N9
N10
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20
T21
T22
U1
U2
U3
U4
U5
U6
U7
U8
U9
U10
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
V1
V2
V3
V4
V5
V6
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
V18
V19
V20
V21
V22
W1
W2
W3
W4
W5
W6
W7
W8
W9
W10
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Pads (484)
NumberType
A1smd
A2smd
A3smd
A4smd
A5smd
A6smd
A7smd
A8smd
A9smd
A10smd
A11smd
A12smd
A13smd
A14smd
A15smd
A16smd
A17smd
A18smd
A19smd
A20smd
A21smd
A22smd
AA1smd
AA2smd
AA3smd
AA4smd
AA5smd
AA6smd
AA7smd
AA8smd
AA9smd
AA10smd
AA11smd
AA12smd
AA13smd
AA14smd
AA15smd
AA16smd
AA17smd
AA18smd
AA19smd
AA20smd
AA21smd
AA22smd
AB1smd
AB2smd
AB3smd
AB4smd
AB5smd
AB6smd
AB7smd
AB8smd
AB9smd
AB10smd
AB11smd
AB12smd
AB13smd
AB14smd
AB15smd
AB16smd
AB17smd
AB18smd
AB19smd
AB20smd
AB21smd
AB22smd
B1smd
B2smd
B3smd
B4smd
B5smd
B6smd
B7smd
B8smd
B9smd
B10smd
B11smd
B12smd
B13smd
B14smd
B15smd
B16smd
B17smd
B18smd
B19smd
B20smd
B21smd
B22smd
C1smd
C2smd
C3smd
C4smd
C5smd
C6smd
C7smd
C8smd
C9smd
C10smd
C11smd
C12smd
C13smd
C14smd
C15smd
C16smd
C17smd
C18smd
C19smd
C20smd
C21smd
C22smd
D1smd
D2smd
D3smd
D4smd
D5smd
D6smd
D7smd
D8smd
D9smd
D10smd
D11smd
D12smd
D13smd
D14smd
D15smd
D16smd
D17smd
D18smd
D19smd
D20smd
D21smd
D22smd
E1smd
E2smd
E3smd
E4smd
E5smd
E6smd
E7smd
E8smd
E9smd
E10smd
E11smd
E12smd
E13smd
E14smd
E15smd
E16smd
E17smd
E18smd
E19smd
E20smd
E21smd
E22smd
F1smd
F2smd
F3smd
F4smd
F5smd
F6smd
F7smd
F8smd
F9smd
F10smd
F11smd
F12smd
F13smd
F14smd
F15smd
F16smd
F17smd
F18smd
F19smd
F20smd
F21smd
F22smd
G1smd
G2smd
G3smd
G4smd
G5smd
G6smd
G7smd
G8smd
G9smd
G10smd
G11smd
G12smd
G13smd
G14smd
G15smd
G16smd
G17smd
G18smd
G19smd
G20smd
G21smd
G22smd
H1smd
H2smd
H3smd
H4smd
H5smd
H6smd
H7smd
H8smd
H9smd
H10smd
H11smd
H12smd
H13smd
H14smd
H15smd
H16smd
H17smd
H18smd
H19smd
H20smd
H21smd
H22smd
J1smd
J2smd
J3smd
J4smd
J5smd
J6smd
J7smd
J8smd
J9smd
J10smd
J11smd
J12smd
J13smd
J14smd
J15smd
J16smd
J17smd
J18smd
J19smd
J20smd
J21smd
J22smd
K1smd
K2smd
K3smd
K4smd
K5smd
K6smd
K7smd
K8smd
K9smd
K10smd
K11smd
K12smd
K13smd
K14smd
K15smd
K16smd
K17smd
K18smd
K19smd
K20smd
K21smd
K22smd
L1smd
L2smd
L3smd
L4smd
L5smd
L6smd
L7smd
L8smd
L9smd
L10smd
L11smd
L12smd
L13smd
L14smd
L15smd
L16smd
L17smd
L18smd
L19smd
L20smd
L21smd
L22smd
M1smd
M2smd
M3smd
M4smd
M5smd
M6smd
M7smd
M8smd
M9smd
M10smd
M11smd
M12smd
M13smd
M14smd
M15smd
M16smd
M17smd
M18smd
M19smd
M20smd
M21smd
M22smd
N1smd
N2smd
N3smd
N4smd
N5smd
N6smd
N7smd
N8smd
N9smd
N10smd
N11smd
N12smd
N13smd
N14smd
N15smd
N16smd
N17smd
N18smd
N19smd
N20smd
N21smd
N22smd
P1smd
P2smd
P3smd
P4smd
P5smd
P6smd
P7smd
P8smd
P9smd
P10smd
P11smd
P12smd
P13smd
P14smd
P15smd
P16smd
P17smd
P18smd
P19smd
P20smd
P21smd
P22smd
R1smd
R2smd
R3smd
R4smd
R5smd
R6smd
R7smd
R8smd
R9smd
R10smd
R11smd
R12smd
R13smd
R14smd
R15smd
R16smd
R17smd
R18smd
R19smd
R20smd
R21smd
R22smd
T1smd
T2smd
T3smd
T4smd
T5smd
T6smd
T7smd
T8smd
T9smd
T10smd
T11smd
T12smd
T13smd
T14smd
T15smd
T16smd
T17smd
T18smd
T19smd
T20smd
T21smd
T22smd
U1smd
U2smd
U3smd
U4smd
U5smd
U6smd
U7smd
U8smd
U9smd
U10smd
U11smd
U12smd
U13smd
U14smd
U15smd
U16smd
U17smd
U18smd
U19smd
U20smd
U21smd
U22smd
V1smd
V2smd
V3smd
V4smd
V5smd
V6smd
V7smd
V8smd
V9smd
V10smd
V11smd
V12smd
V13smd
V14smd
V15smd
V16smd
V17smd
V18smd
V19smd
V20smd
V21smd
V22smd
W1smd
W2smd
W3smd
W4smd
W5smd
W6smd
W7smd
W8smd
W9smd
W10smd
W11smd
W12smd
W13smd
W14smd
W15smd
W16smd
W17smd
W18smd
W19smd
W20smd
W21smd
W22smd
Y1smd
Y2smd
Y3smd
Y4smd
Y5smd
Y6smd
Y7smd
Y8smd
Y9smd
Y10smd
Y11smd
Y12smd
Y13smd
Y14smd
Y15smd
Y16smd
Y17smd
Y18smd
Y19smd
Y20smd
Y21smd
Y22smd

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SymbolDownload Library
Footprint

Details

LibraryMCU_SiFive
Pin Count484
FootprintBGA-484_23.0x23.0mm_Layout22x22_P1.0mm
Pad Count484
View Datasheet

Keywords

SiFive