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TC51832P
32K x 8-bit CMOS Pseudo-Static RAM, 85/100/120ns access time, 5V ±10% supply, DIP-28 (600 mil)
Schematic Symbol
Pin Configuration (28 pins)
| Pin | Name | Type |
|---|---|---|
| 14 | GND | power_in |
| 28 | V_{DD} | power_in |
| 1 | A_{14} | input |
| 2 | A_{12} | input |
| 3 | A_{7} | input |
| 4 | A_{6} | input |
| 5 | A_{5} | input |
| 6 | A_{4} | input |
| 7 | A_{3} | input |
| 8 | A_{2} | input |
| 9 | A_{1} | input |
| 10 | A_{0} | input |
| 11 | I/O_{0} | tri_state |
| 12 | I/O_{1} | tri_state |
| 13 | I/O_{2} | tri_state |
| 15 | I/O_{3} | tri_state |
| 16 | I/O_{4} | tri_state |
| 17 | I/O_{5} | tri_state |
| 18 | I/O_{6} | tri_state |
| 19 | I/O_{7} | tri_state |
| 20 | ~{CE} | input |
| 21 | A_{10} | input |
| 22 | ~{OE}/~{RFSH} | input |
| 23 | A_{11} | input |
| 24 | A_{9} | input |
| 25 | A_{8} | input |
| 26 | A_{13} | input |
| 27 | ~{WE} | input |
Footprint
ConfirmedPackage_DIP/DIP-28_W15.24mm
Pad Layout
1
2
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4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Pads (28)
| Number | Type |
|---|---|
| 1 | thru hole |
| 2 | thru hole |
| 3 | thru hole |
| 4 | thru hole |
| 5 | thru hole |
| 6 | thru hole |
| 7 | thru hole |
| 8 | thru hole |
| 9 | thru hole |
| 10 | thru hole |
| 11 | thru hole |
| 12 | thru hole |
| 13 | thru hole |
| 14 | thru hole |
| 15 | thru hole |
| 16 | thru hole |
| 17 | thru hole |
| 18 | thru hole |
| 19 | thru hole |
| 20 | thru hole |
| 21 | thru hole |
| 22 | thru hole |
| 23 | thru hole |
| 24 | thru hole |
| 25 | thru hole |
| 26 | thru hole |
| 27 | thru hole |
| 28 | thru hole |