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uPD41264C
256Kbit Dual-Port Dynamic NMOS RAM (64K x 4-bit), 120/150ns access time (RAM Port), 40/60ns access time (Serial Port), 5V ±10% supply, DIP-24 (400 mil)
Schematic Symbol
Pin Configuration (24 pins)
| Pin | Name | Type |
|---|---|---|
| 12 | V_{CC} | power_in |
| 24 | GND | power_in |
| 1 | SC | input |
| 2 | SO_{0} | tri_state |
| 3 | SO_{1} | tri_state |
| 4 | ~{DT}/~{OE} | input |
| 5 | W_{0}/IO_{0} | bidirectional |
| 6 | W_{1}/IO_{1} | bidirectional |
| 7 | ~{WB}/~{WE} | input |
| 8 | ~{RAS} | input |
| 9 | A_{6} | input |
| 10 | A_{5} | input |
| 11 | A_{4} | input |
| 13 | A_{7} | input |
| 14 | A_{3} | input |
| 15 | A_{2} | input |
| 16 | A_{1} | input |
| 17 | A_{0} | input |
| 18 | ~{CAS} | input |
| 19 | W_{2}/IO_{2} | bidirectional |
| 20 | W_{3}/IO_{3} | bidirectional |
| 21 | ~{SOE} | input |
| 22 | SO_{2} | tri_state |
| 23 | SO_{3} | tri_state |
Footprint
ConfirmedPackage_DIP/DIP-24_W10.16mm
Pad Layout
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19
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21
22
23
24
Pads (24)
| Number | Type |
|---|---|
| 1 | thru hole |
| 2 | thru hole |
| 3 | thru hole |
| 4 | thru hole |
| 5 | thru hole |
| 6 | thru hole |
| 7 | thru hole |
| 8 | thru hole |
| 9 | thru hole |
| 10 | thru hole |
| 11 | thru hole |
| 12 | thru hole |
| 13 | thru hole |
| 14 | thru hole |
| 15 | thru hole |
| 16 | thru hole |
| 17 | thru hole |
| 18 | thru hole |
| 19 | thru hole |
| 20 | thru hole |
| 21 | thru hole |
| 22 | thru hole |
| 23 | thru hole |
| 24 | thru hole |