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ADP7118AUJZ-X.X
200 mA, Low Noise, CMOS LDO Linear Regulator
Schematic Symbol
Pin Configuration (5 pins)
| Pin | Name | Type |
|---|---|---|
| 1 | VIN | input |
| 3 | EN | input |
| 2 | GND | power_in |
| 5 | VOUT | power_in |
| 4 | SENSE | passive |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.