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100EP14

1:5 Clock Distribution Chip

Schematic Symbol

100EP14~{EN}SEL~{CLK1}SCLK1CLK0~{CLK0}VCCVCCVEEVBBQ0~{Q}0Q1~{Q}1Q2~{Q}2Q3~{Q}3Q4~{Q}4

Pin Configuration (20 pins)

PinNameType
19~{EN}input
12SELinput
17~{CLK1}input
16SCLK1input
13CLK0input
14~{CLK0}input
15VBBoutput
18VCCpower_in
20VCCpower_in
1Q0output
2~{Q}0output
3Q1output
4~{Q}1output
5Q2output
6~{Q}2output
7Q3output
8~{Q}3output
9Q4output
10~{Q}4output
11VEEpower_in

Footprint

This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.

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Details

Pin Count20