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100EPT21D
3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator
Schematic Symbol
Pin Configuration (8 pins)
| Pin | Name | Type |
|---|---|---|
| 2 | D0 | input |
| 3 | ~{D0} | input |
| 1 | NC | passive |
| 4 | VBB | power_in |
| 7 | Q0 | output |
| 6 | NC | passive |
| 8 | VCC | power_in |
| 5 | GND | power_in |
Footprint
This symbol has no default footprint. It's typically a generic part where the footprint depends on the package you choose.