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Si5345B-D
Jitter Attenuator/Clock Multiplier, 10-channel, Fractional, 0.001-350 MHz, QFN-64
Schematic Symbol
Pin Configuration (65 pins)
| Pin | Name | Type |
|---|---|---|
| 1 | IN1 | input |
| 2 | IN1b | input |
| 3 | IN_SEL0 | input |
| 4 | IN_SEL1 | input |
| 5 | NC | no_connect |
| 6 | ~{RST} | input |
| 7 | X1 | input |
| 8 | XA | input |
| 9 | XB | input |
| 10 | X2 | input |
| 11 | ~{OE} | input |
| 12 | ~{INTR} | output |
| 13 | VDDA | power_in |
| 14 | IN2 | input |
| 15 | IN2b | input |
| 16 | SCLK | input |
| 17 | A1/SDO | bidirectional |
| 18 | SDA/SDIO | bidirectional |
| 19 | A0/~{CS} | input |
| 20 | NC | no_connect |
| 21 | NC | no_connect |
| 22 | VDDO0 | power_in |
| 23 | OUT0b | output |
| 24 | OUT0 | output |
| 25 | FDEC | input |
| 26 | VDDO1 | power_in |
| 27 | OUT1b | output |
| 28 | OUT1 | output |
| 29 | VDDO2 | power_in |
| 30 | OUT2b | output |
| 31 | OUT2 | output |
| 32 | VDD | power_in |
| 33 | VDDO3 | power_in |
| 34 | OUT3b | output |
| 35 | OUT3 | output |
| 36 | VDDO4 | power_in |
| 37 | OUT4b | output |
| 38 | OUT4 | output |
| 39 | I2C_SEL | input |
| 40 | VDDO5 | power_in |
| 41 | OUT5b | output |
| 42 | OUT5 | output |
| 43 | VDDO6 | power_in |
| 44 | OUT6b | output |
| 45 | OUT6 | output |
| 46 | VDD | passive |
| 47 | ~{LOL} | output |
| 48 | FINC | input |
| 49 | VDDO7 | power_in |
| 50 | OUT7b | output |
| 51 | OUT7 | output |
| 52 | VDDO8 | power_in |
| 53 | OUT8b | output |
| 54 | OUT8 | output |
| 55 | NC | no_connect |
| 56 | NC | no_connect |
| 57 | VDDO9 | power_in |
| 58 | OUT9b | output |
| 59 | OUT9 | output |
| 60 | VDD | passive |
| 61 | IN3/FB_IN | input |
| 62 | IN3b/FB_INb | input |
| 63 | IN0 | input |
| 64 | IN0b | input |
| 65 | GND | power_in |
Footprint
ConfirmedPackage_DFN_QFN/QFN-64-1EP_9x9mm_P0.5mm_EP5.2x5.2mm
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