Footprints
151 footprints matching “T-1”
Land patterns on their own — 19,830 of them, most never referenced by a symbol in the catalog. Each passed the courtyard and pad checks; 7,626 come with the 3D model they name.
SOIC-16_3.9x9.9mm_P1.27mm
Package_SO
SOIC, 16 Pin (JEDEC MS-012, variation AC, https://www.jedec.org/document_search?search_api_views_fulltext=MS-012, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf)
- Pads
- 16
- SMD
- 7.4×10.4
- Boards
- 1,078
TSSOP-14_4.4x5mm_P0.65mm
Package_SO
TSSOP, 14 Pin (JEDEC MO-153 variation AB-1, 1.00mm body thickness, https://www.jedec.org/document_search?search_api_views_fulltext=MO-153)
- Pads
- 14
- SMD
- 7.7×5.5
- Boards
- 507
TSSOP-10_3x3mm_P0.5mm
Package_SO
TSSOP, 10 Pin (https://www.ti.com/lit/ml/mpds035c/mpds035c.pdf, https://www.ti.com/lit/ds/symlink/ads1115.pdf#page=50, https://www.nxp.com/docs/en/package-information/SOT552-1.pdf)
- Pads
- 10
- SMD
- 6.3×3.5
- Boards
- 153
SO-16_3.9x9.9mm_P1.27mm
Package_SO
SO, 16 Pin (https://www.nxp.com/docs/en/package-information/SOT109-1.pdf)
- Pads
- 16
- SMD
- 7.4×10.4
- Boards
- 141
SOIC-8_5.3x5.3mm_P1.27mm
Package_SO
SOIC, 8 Pin (JEITA/EIAJ ED-7311-19 variation 08-001-BBA and Atmel/Microchip, 208 mils width, https://www.jeita.or.jp/japanese/standard/book/ED-7311-19/#target/page_no=21, https://ww1.microchip.com/downloads/en/DeviceDoc/20005045C.pdf#page=23, https://ww1.microchip.com/downloads/en/DeviceDoc/doc2535.pdf#page=162)
- Pads
- 8
- SMD
- 9.3×5.8
- Boards
- 139
SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
Package_SO
SOIC, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ada4898-1_4898-2.pdf#page=29)
- Pads
- 9
- SMD
- 7.4×5.4
- Boards
- 135
SSOP-16_3.9x4.9mm_P0.635mm
Package_SO
SSOP, 16 Pin (https://www.nxp.com/docs/en/package-information/SOT519-1.pdf#page=2)
- Pads
- 16
- SMD
- 7.4×5.4
- Boards
- 98
Texas_HTSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.4x3.1mm_ThermalVias
Package_SO
8-pin HTSOP package with 1.27mm pin pitch, compatible with SOIC-8, 3.9x4.9mm body, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf
- Pads
- 9
- SMD
- 8.4×5.5
- Boards
- 47
SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm_ThermalVias
Package_SO
SOIC, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ada4898-1_4898-2.pdf#page=29)
- Pads
- 9
- SMD
- 7.4×5.4
- Boards
- 40
SSOP-20_4.4x6.5mm_P0.65mm
Package_SO
SSOP, 20 Pin (https://www.jedec.org/system/files/docs/Mo-152c.pdf)
- Pads
- 20
- SMD
- 7.8×7.0
- Boards
- 39
SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm_ThermalVias
Package_SO
SOIC, 8 Pin (http://www.allegromicro.com/~/media/Files/Datasheets/A4950-Datasheet.ashx#page=8)
- Pads
- 9
- SMD
- 7.4×5.4
- Boards
- 38
Texas_HSOP-8-1EP_3.9x4.9mm_P1.27mm_ThermalVias
Package_SO
Texas Instruments HSOP 9, 1.27mm pitch, 3.9x4.9mm body, exposed pad, thermal vias, DDA0008J (http://www.ti.com/lit/ds/symlink/tps5430.pdf)
- Pads
- 9
- SMD
- 7.5×5.5
- Boards
- 34
SSOP-10-1EP_3.9x4.9mm_P1mm_EP2.1x3.3mm
Package_SO
SSOP, 10 Pin (http://download.py32.org/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/zh-CN/PY32F002A%20%E7%B3%BB%E5%88%97%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C_Rev1.0.pdf#page=44)
- Pads
- 11
- SMD
- 7.5×5.4
- Boards
- 33
HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask2.46x2.31mm_ThermalVias
Package_SO
HTSSOP, 16 Pin (Texas Instruments PWP0016C, based on JEDEC MO-153 variation ABT, 1.00mm body thickness, https://www.ti.com/lit/ml/pptd023ac/pptd023ac.pdf, https://www.ti.com/lit/ds/symlink/drv8833.pdf#page=27, https://www.jedec.org/document_search?search_api_views_fulltext=MO-153)
- Pads
- 17
- SMD
- 7.8×5.5
- Boards
- 31
HSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.1mm_ThermalVias
Package_SO
HSOP, 8 Pin (https://www.st.com/resource/en/datasheet/l5973d.pdf)
- Pads
- 9
- SMD
- 7.4×5.4
- Boards
- 28
MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm
Package_SO
MSOP, 10 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3805fg.pdf#page=18)
- Pads
- 11
- SMD
- 6.3×3.5
- Boards
- 28
SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
Package_SO
SOIC, 8 Pin (http://www.allegromicro.com/~/media/Files/Datasheets/A4950-Datasheet.ashx#page=8)
- Pads
- 9
- SMD
- 7.4×5.4
- Boards
- 28
HSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.1mm
Package_SO
HSOP, 8 Pin (https://www.st.com/resource/en/datasheet/l5973d.pdf)
- Pads
- 9
- SMD
- 7.4×5.4
- Boards
- 25
TSSOP-16-1EP_4.4x5mm_P0.65mm
Package_SO
FE Package; 16-Lead Plastic TSSOP (4.4mm); Exposed Pad Variation BB; (see Linear Technology 1956f.pdf)
- Pads
- 17
- SMD
- 7.0×5.7
- Boards
- 25
HTSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.4x3.2mm
Package_SO
HTSOP, 8 Pin (https://media.digikey.com/pdf/Data%20Sheets/Rohm%20PDFs/BD9G341EFJ.pdf)
- Pads
- 9
- SMD
- 7.4×5.4
- Boards
- 20
SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.81mm
Package_SO
SOIC, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ada4898-1_4898-2.pdf#page=29)
- Pads
- 9
- SMD
- 7.4×5.4
- Boards
- 17
SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.514x3.2mm
Package_SO
SOIC, 8 Pin (https://www.renesas.com/eu/en/www/doc/datasheet/hip2100.pdf#page=13)
- Pads
- 9
- SMD
- 7.4×5.4
- Boards
- 17
HTSSOP-56-1EP_6.1x14mm_P0.5mm_EP3.61x6.35mm
Package_SO
HTSSOP56: plastic thin shrink small outline package http://www.ti.com/lit/ds/symlink/drv8301.pdf
- Pads
- 57
- SMD
- 9.6×14.6
- Boards
- 16
SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.71x3.4mm_ThermalVias
Package_SO
SOIC, 8 Pin (JEDEC MS-012 variation BA (thermally enhanced), using tolerances and Exposed Pad from Texas Instruments DDA0008B, https://www.ti.com/lit/ml/pptd058j/pptd058j.pdf, https://www.ti.com/lit/ds/symlink/lm5017.pdf#page=35, https://www.jedec.org/document_search?search_api_views_fulltext=MS-012)
- Pads
- 9
- SMD
- 7.4×5.4
- Boards
- 16